14 FN7780.1 August 16, 2011 DCP Description Each DCP is implemented with a combination of resistor elements and CMOS switches. The phy" />
參數(shù)資料
型號: ISL23415WFUZ-T7A
廠商: Intersil
文件頁數(shù): 6/20頁
文件大?。?/td> 0K
描述: IC DGTL POT 256POS 10K 10MSOP
產(chǎn)品培訓模塊: Solutions for Industrial Control Applications
標準包裝: 1
系列: XDCP™
接片: 256
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標準值 175 ppm/°C
存儲器類型: 易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 10-MSOP
包裝: 標準包裝
其它名稱: ISL23415WFUZ-T7ADKR
ISL23415
14
FN7780.1
August 16, 2011
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of DCP are
equivalent to the fixed terminals of a mechanical potentiometer
(RH and RL pins). The RW pin of the DCP is connected to
intermediate nodes, and is equivalent to the wiper terminal of a
mechanical potentiometer. The position of the wiper terminal
within the DCP is controlled by the 8-bit volatile Wiper Register
(WR). When the WR of a DCP contains all zeroes (WR[7:0] = 00h),
its wiper terminal (RW) is closest to its “Low” terminal (RL). When
the WR register of a DCP contains all ones (WR[7:0] = FFh), its
wiper terminal (RW) is closest to its “High” terminal (RH). As the
value of the WR increases from all zeroes (0) to all ones (255
decimal), the wiper moves monotonically from the position
closest to RL to the position closest to RH. At the same time, the
resistance between RW and RL increases monotonically, while
the resistance between RH and RW decreases monotonically.
While the ISL23415 is being powered up, the WR is reset to 80h
(128 decimal), which locates RW roughly at the center between
RL and RH.
The WR can be read or written to directly using the SPI serial
interface as described in the following sections.
Memory Description
The ISL23415 contains two volatile 8-bit registers: the Wiper
Register (WR) and the Access Control Register (ACR). Memory map
of ISL23415 is in Table 1. The Wiper Register WR at address 0
contains current wiper position of the DCP. The Access Control
Register (ACR) at address 10h contains information and control
bits described in Table 2.
The SDO bit (ACR[1]) configures type of SDO output pin. The
default value of SDO bit is 0 for Push-Pull output. The SDO pin
can be configured as Open Drain output for some applications. In
this case, an external pull-up resistor is required, reference the
Shutdown Function
The SHDN bit (ACR[6]) disables or enables shutdown mode for all
DCP channels simultaneously. When this bit is 0, i.e., each DCP is
forced to end-to-end open circuit and each RW shorted to RL
through a 2k serial resistor, as shown in Figure 25. Default value
of the SHDN bit is 1.
When the device enters shutdown, all current DCP WR settings are
maintained. When the device exits shutdown, the wipers will
return to the previous WR settings after a short settling time
(see Figure 26).
SPI Serial Interface
The ISL23415 supports an SPI serial protocol, mode 0. The
device is accessed via the SDI input and SDO output with data
clocked in on the rising edge of SCK, and clocked out on the
falling edge of SCK. CS must be LOW during communication with
the ISL23415. The SCK and CS lines are controlled by the host or
master. The ISL23415 operates only as a slave device.
All communication over the SPI interface is conducted by
sending the MSB of each byte of data first.
Protocol Conventions
The SPI protocol contains Instruction Byte followed by one or more
Data Bytes. A valid Instruction Byte contains instruction as the three
MSBs, with the following five register address bits (see Table 3).
The next byte sent to the ISL23415 is the Data Byte.
Table 4 contains a valid instruction set for ISL23415.
If the [R4:R0] bits are zero or one, then the read or write is to the
WRi register. If the [R4:R0] are 10000, then the operation is to
the ACR.
TABLE 1. MEMORY MAP
ADDRESS
(hex)
VOLATILE
DEFAULT SETTING
(hex)
10
ACR
40
0WR
80
TABLE 2. ACCESS CONTROL REGISTER (ACR)
BIT #
7
6
5
4
3210
NAME
0SHDN
00
0
SDO
0
FIGURE 25. DCP CONNECTION IN SHUTDOWN MODE
FIGURE 26. SHUTDOWN MODE WIPER RESPONSE
TABLE 3. INSTRUCTION BYTE FORMAT
BIT #
7
654321
0
I2
I1
I0
R4
R3
R2
R1
R0
2k
RW
RL
RH
POWER-UP
USER PROGRAMMED
MID SCALE = 80H
SHDN ACTIVATED
SHDN RELEASED
AFTER SHDN
WI
PE
R
VO
LT
AGE,
V
RW
(V)
SHDN MODE
TIME (s)
WIPER RESTORE TO
THE ORIGINAL POSITION
0
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