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參數(shù)資料
| 型號(hào)： | ISL23428TFVZ-T7A |
| 廠商： | Intersil |
| 文件頁數(shù)： | 20/21頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT 2CH 100K 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XDCP™ |
| 接片： | 128 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 45 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 1.2 V ~ 5.5 V，1.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ISL23428TFVZ-T7ADKR |
ISL23428
8
FN7904.1
July 19, 2012
tRO
SDO Output Rise Time
Rpu = 1.5k, Cbus = 30pF
60
ns
tFO
SDO Output Fall Time
Rpu = 1.5k, Cbus = 30pF
60
ns
tCS
CS Deselect Time
2
s
NOTES:
7. Typical values are for TA = +25°C and 3.3V supply voltages.
8. LSB = [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the incremental
voltage when changing from one tap to an adjacent tap.
9. ZS error = V(RW)0/LSB.
10. FS error = [V(RW)127 – VCC]/LSB.
11. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
12. INL = [V(RW)i – i LSB – V(RW)0]/LSB for i = 1 to 127
13.
for i = 8 to 127decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper voltage
and Min( ) is the minimum value of the wiper voltage over the temperature range.
14. MI = |RW127 – RW0|/127. MI is a minimum increment. RW127 and RW0 are the measured resistances for the DCP register set to 7F hex and 00
hex respectively.
15. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW127/MI, when measuring between RW and RH.
16. RDNL = (RWi – RWi-1)/MI -1, for i = 8 to 127.
17. RINL = [RWi – (MI i) – RW0]/MI, for i = 8 to 127.
18.
for i = 8 to 127, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min( ) is the
minimum value of the resistance over the temperature range.
19. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
20. It is preferable to ramp up both the VLOGIC and the VCC supplies at the same time. If this is not possible it is recommended to ramp-up the VLOGIC
first followed by the VCC.
21. VMATCH = [V(RWx)i - V(RWy)i]/LSB, for i = 1 to 127, x = 0 to 1 and y = 0 to 1.
22. RMATCH = (RWi,x - RWi,y)/MI, for i = 1 to 127, x = 0 to 1 and y = 0 to 1.
Serial Interface Specification For SCK, SDI, SDO, CS Unless Otherwise Noted. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 7)
MAX
(Note 19)
UNITS
TCV
Max V RW
()i
() Min V RW
()i
()
–
VRWi +25°C
()
------------------------------------------------------------------------------
106
+165°C
---------------------
×
=
TCR
Max Ri
() Min Ri
()
–
[]
Ri +25°C
()
-------------------------------------------------------
10
6
+165°C
---------------------
×
=
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