參數(shù)資料
型號: ISL23448UFRZ-TK
廠商: Intersil
文件頁數(shù): 1/21頁
文件大小: 0K
描述: IC DGTL POT 4CH 50K 20QFN
產(chǎn)品培訓模塊: Solutions for Industrial Control Applications
標準包裝: 1,000
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標準值 65 ppm/°C
存儲器類型: 易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤
供應商設備封裝: 20-QFN(3x4)
包裝: 帶卷 (TR)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
Quad, 128 Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP)
ISL23448
The ISL23448 is a volatile, low voltage, low noise, low power,
128 tap, quad digitally controlled potentiometer (DCP) with an
SPI Bus interface. It integrates four DCP cores, wiper
switches and control logic on a monolithic CMOS integrated
circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly
written to and read by the user. The contents of the WRi
controls the position of the wiper. When powered on, the wiper
of each DCP will always commence at mid-scale (64 tap
position).
The low voltage, low power consumption, and small package
of the ISL23448 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23448 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23448 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Power supply margining
Trimming sensor circuits
Gain adjustment in battery powered instruments
RF power amplifier bias compensation
Features
Four potentiometers per package
128 resistor taps
10k
, 50k or 100k total resistance
SPI serial interface
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
Power supply
-VCC = 1.7V to 5.5V analog power supply
-VLOGIC = 1.2V to 5.5V SPI bus/logic power supply
Maximum supply current without serial bus activity
(standby)
- 5A @ VCC and VLOGIC = 5V
- 2A @ VCC and VLOGIC = 1.7V
Shutdown Mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
Wiper resistance: 70 typical @ VCC = 3.3V
Power-on preset to mid-scale (64 tap position)
Extended industrial temperature range: -40°C to +125°C
20 Ld TSSOP or 20 Ld QFN packages
Pb-free (RoHS compliant)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10k DCP
FIGURE 2. VREF ADJUSTMENT
0
2000
4000
6000
8000
10000
032
64
96
128
TAP POSITION (DECIMAL)
RES
IS
T
ANCE
(
)
VREF_M
ISL28114
1 DCP
OF
ISL23448
+
-
VREF
RL1
RW1
RH1
August 19, 2011
FN7905.0
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