ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319
8
FN7549.2
February 26, 2014
tACQ
Acquisition time in Auto Power-Down
Mode
150
s
tSCLKH
SCLK High Time
20
ns
tSCLKL
SCLK Low Time
20
ns
tCNV
CNV Pulse Width
100
ns
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. The device may become nonresponsive if the minimum acquisition times are not met in their respective modes, requiring a power cycle to restore
normal operation.
8. Transition time to high impedance state is dominated by RC loading on the SDOUT pin. Specified value is measured using equivalent loading shown
Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz and TA = -40°C to +125°C (typical performance
at +25°C), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST LEVEL OR NOTES
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
FIGURE 2. EQUIVALENT LOAD CIRCUIT FOR DIGITAL OUTPUT TESTING
OUTPUT PIN
CL
10pF
VDD
2k
RL