- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8956 > ICS1562BM-201-4LFT (IDT, Integrated Device Technology Inc)IC VIDEO CLK SYNTHESIZER 16-SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | ICS1562BM-201-4LFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 14/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO CLK SYNTHESIZER 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 時(shí)鐘/頻率合成器，時(shí)鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | CMOS，TTL，晶體 |
| 輸出： | CMOS，PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 260MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 1562BM-201-4LFT |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)
Digital Inputs - ICS1562B-201 Option
The programming of the ICS1562B-201 is performed serially
by using the DATCLK, DATA, and HOLD~pins to load an
internal shift register.
DATA is shifted into the register on the rising edge of
DATCLK. The logic value on the HOLD~pin is latched at the
same time. When HOLD~ is low, the shift register may be
loaded without disturbing the operation of the ICS1562B.
When high, the shift register outputs are transferred to the
control registers, and the new programming information be-
comes active. Ordinarily, a high level should be placed on the
HOLD~ pin when the last data bit is presented. See Figure 3
for the programming sequence.
An additional control pin on the ICS1562B-201, BLANK can
perform either of two functions. It may be used to disable the
phase-frequency detector in line-locked applications. Alterna-
tively, the BLANK pin may be used as a synchronous enable
for VRAM shift clock generation. See sections on Line-Locked
Operations and VRAM shift clock generation for details.
Output Description
The differential output drivers, CLK+ and CLK, are current-
mode and are designed to drive resistive terminations in a
complementary fashion. The outputs are current-sinking only,
with the amount of sink current programmable via the IPRG
pin. The sink current, which is steered to either CLK+or CLK-,
is four times the current supplied to the IPRG pin. For most
applications, a resistor from VDDO to IPRG will set the current
to the necessary precision. Additionally, minor adjustment to
the duty factor can be achieved under register control.
The LOAD output is a high-current CMOS type drive whose
frequency is controlled by a programmable divider that may be
selected for a modulus of 3, 4, 5, 6, 8, 10, 12, 16 or 20. It may
also be suppressed under register control. The load output may
be programmed to output the VCO frequency divided by 2 (see
AUX_N1 description in Register Mapping section), inde-
pendent of the differential output and N1 divider modulus.
The LD/N2 output is high-current CMOS type drive whose
frequency is derived from the LOAD output. The programma-
ble modulus may range from 1 to 512 in steps of one.
5
4
2
1
3
DATA VALID
ADDRESS VALID
AD0-AD3
STROBE
ICS1562B-001 Register Loading
Figure 2
8
67
DATCLK
DATA
HOLD
DATA_1
DATA_2
DATA_56
ICS1562B-201 Register Loading
Figure 3
This allows the synthesizer to be completely programmed for
the desired frequency before it is made active. Once the part
has been “unlocked” by the 32 writes, programming becomes
effective immediately.
ALL registers identified in the data sheet (0-9, 11, 12 & 15)
MUST be written upon initial programming. The programming
registers are not initialized upon power-up, but the latched
outputs of those registers are. The latch is made transparent
after 32 register writes. If any register has not been written, the
state upon power-up (random) will become effective. Registers
13 & 14 physically do not exist. Register 10 does exist, but is
reserved for future expansion. To insure compatibility with
possible future modifications to the database, ICS recommends
that all three unused locations be written with zero.
ICS1562B
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS843002AKI-40LFT | IC SYNTHESIZER LVPECL 32-VFQFPN |
| VI-BND-MV-F4 | CONVERTER MOD DC/DC 85V 150W |
| VI-BND-MV-F3 | CONVERTER MOD DC/DC 85V 150W |
| VI-BND-MV-F1 | CONVERTER MOD DC/DC 85V 150W |
| MS3454W16-9SW | CONN RCPT 4POS JAM NUT W/SCKT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL28005FH50Z-T7A | 功能描述:放大器 IC 開發(fā)工具 ISL28005FH50Z MICROP WR CUR SENSE AMP W/ RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評(píng)估:IR4302 工作電源電壓:13 V to 23 V |
| ISL28006 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Micropower, Rail to Rail Input Current Sense Amplifier |
| ISL28006_10 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Micropower, Rail to Rail Input Current Sense Amplifier with Voltage Output |
| ISL28006_11 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Micropower, Rail to Rail Input Current Sense Amplifier |
| ISL28006FH-100EVAL1Z | 功能描述:放大器 IC 開發(fā)工具 ISL28006FH EVALRD 1 5LD GAIN OF 100 RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評(píng)估:IR4302 工作電源電壓:13 V to 23 V |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。