參數(shù)資料
型號: ISL29002
廠商: Intersil Corporation
英文描述: Light-to-Digital I2C Sensor(光電I2C傳感器)
中文描述: 光到數(shù)字的I2C傳感器(光電傳感器的I2C)
文件頁數(shù): 6/10頁
文件大?。?/td> 196K
代理商: ISL29002
6
FN7465.2
December 1, 2006
Command Register
The command register is used to define the ADC's
operations. Table 1 shows the primary commands used to
control the ADC.
Note that there are two classes of operating commands:
three for internal timing, and three for external (arbitrary)
timing.
When using any of the three internal timing commands, the
device self-times each conversion, which is nominally 110ms
(with
R
EXT
= 100k
Ω).
When using any of the three external timing commands,
each command received by the device ends one conversion
and begins another. The integration time of the device is
thus the time between one I
2
C external timing command and
the next. The integration time can be between 1ms and
100ms. The external timing commands can be used to
synchronize the ADC’s integrating time to a PWM dimming
frequency in a backlight system in order to eliminate noise.
TABLE 1. COMMAND REGISTERS AND FUNCTIONS
COMMAND
FUNCTION
8C(hex)
ADC is powered-down. To enable ADC from a powered-down state, send any command to the ISL29002.
0C(hex)
ADC is reset. A reset restarts the counter value to zero and returns the clock cycle to zero.
00(hex)
Internal Timing Mode. Integration
time is 110ms per photodiode.
ADC converts Diode 1’s current (I
DIODE1
) into an unsigned-magnitude 16-bit data.
04(hex)
ADC converts Diode 2’s current (I
DIODE2
) into unsigned-magnitude 16-bit data.
08(hex)
ADC converts I
DIODE1
-I
DIODE2
into 2’s-complement 16-bit data.
30(hex)
External Timing Mode. Each external
timing command sent to the device
ends one integration period and
begins another.
ADC converts Diode 1’s current (I
DIODE1
) into unsigned-magnitude 16-bit data.
34(hex)
ADC converts Diode 2’s current (I
DIODE1
) into unsigned-magnitude 16-bit data.
38(hex)
ADC converts I
DIODE1
-I
DIODE2
into 2’s-complement 16-bit data.
I
2
C communication test. The value written to the command register can be read
back via the I
2
C bus.
1xxx_xxxx
(binary)
FIGURE 11A.
I
2
C
WRITE TIMING DIAGRAM SAMPLE
FIGURE 11B.
I
2
C
READ TIMING DIAGRAM SAMPLE
FIGURE 11.
Start
W
A
A
A6
A5
A4
A3
A2
A1
A0
W
A
R7
R6
R5
R4
R3
R2
R1
R0
A
A
A
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
STOP
SDA DRIVEN BY MASTER
POWER DOWN CMD 8C(h)
I
2
C CLK In
SDA DRIVEN BY MASTER
I
2
C SDA In
I
2
C SDA Out
DEVICE ADDRESS 40(h) to 47(h)
I
2
C DATA
Start
A
A
A6
A5
A4
A3
A2
A1
A0
R
A
A
A
A
D7
D6
D5
D4
D3
D2
D1
D0
A
D7
D6
D5
D4
D3
D2
D1
D0
A
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
I
2
C CLK In
SDA DRIVEN BY MASTER
R/W
SDA DRIVEN BY ISL29002
I
2
C SDA In
I
2
C SDA Out
DEVICE ADDRESS 44(HEX)
I
2
C DATA
MSB OF SENSOR READING
STOP
LSB OF SENSOR READING
SDA DRIVEN BY ISL29002
ISL29002
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