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參數(shù)資料
| 型號： | ISL32272EIVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 0K |
| 描述： | IC TX RS422 QUAD 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 類型： | 發(fā)射器 |
| 驅(qū)動器/接收器數(shù)： | 4/0 |
| 規(guī)程： | RS422 |
| 電源電壓： | 3 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 散裝 |
11
FN6824.1
March 13, 2013
interface with “l(fā)ogic” devices such as UARTs, ASICs, and
controllers, and today most of these devices use power
supplies significantly lower than 3.3V. Thus, the logic
device’s low VOH might not exceed the VIH of a 3.3V or 5V
powered DI or enable input. Connecting the VL pin to the
power supply of the logic device (as shown in Figure 6)
reduces the DI and enable input switching points to values
compatible with the logic device’s output levels. Tailoring the
logic pin input switching points to the supply voltage of the
UART, ASIC, or controller eliminates the need for a level
shifter/translator between the two ICs.
indicates typical VIH and VIL values for various VL settings
so the user can ascertain whether or not a particular VL
voltage meets his needs.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-422 control
lines (EN, EN, ENx) is unable to ensure that the RS-422 Tx
outputs remain disabled. If the equipment is connected to
the bus, a driver activating prematurely during power-up may
drive invalid data on the bus. To avoid this scenario, this
family incorporates a “Hot Plug” function. During power-up,
circuitry monitoring VCC ensures that the Tx outputs remain
disabled for a period of time, regardless of the state of the
enable pins. This gives the processor/ASIC a chance to
stabilize and drive the RS-422 control lines to the proper states.
ESD Protection
All pins on these devices include class 3 (>12kV) Human
Body Model (HBM) ESD protection structures, but the
RS-422 pins (driver outputs) incorporate advanced
structures allowing them to survive ESD events in excess
of ±15kV HBM, and ±16.5kV to IEC61000-4-2. The RS-422
pins are particularly vulnerable to ESD damage because
they typically connect to an exposed port on the exterior of
the finished product. Simply touching the port pins, or
connecting a cable, can cause an ESD event that might
destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, and
without degrading the RS-422 common mode range of
-0.3V to +6V. This built-in ESD protection eliminates the
need for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-422 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The
IEC61000 standard’s lower current limiting resistor coupled
with the larger charge storage capacitor yields a test that is
much more severe than the HBM test. The extra ESD
protection built into this device’s RS-422 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-422 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The RS-422 pins withstand ±16.5kV
air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
TABLE 2. VIH AND VIL vs VL FOR VCC = 3.3V OR 5V
VL (V)
VIH (V)
VIL (V)
1.6
0.7
0.45
2
0.85
0.6
2.3
1.1
0.75
2.7
1.4 (DI), 1.1 (ENs)
0.85
2.7
2
0.8
3.3
2.2
0.8
FIGURE 6. USING VL PIN TO ADJUST LOGIC LEVELS
GND
TXD
DEN
VCC = +2V
UART/PROCESSOR
GND
DI
EN
VCC = +3.3V
ISL32172E
VOH ≤ 2
VIH ≥ 2
GND
TXD
DEN
VCC = +2V
UART/PROCESSOR
GND
DI
EN
VCC = +3.3V
ISL32179E
VOH ≤ 2
VIH = 0.85V
VL
VOH ≤ 2
VIH ≥ 2
VOH ≤ 2
ISL32172E, ISL32272E, ISL32372E, ISL32174E, ISL32274E, ISL32374E, ISL32179E
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參數(shù)描述 |
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| ISL32272EIVZ-T | 功能描述:IC TX RS422 QUAD 16TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| ISL32273E | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:QUAD, ±16.5kV ESD Protected, 3.0V to 5.5V, RS-485/RS-422 Receivers |
| ISL32273E-77E | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Add a Loss of Signal (LOS) Indicator to Your RS-485 or RS-422 Transceiver |
| ISL32273EFBZ | 功能描述:IC RCVR RS485/422 QD ESD 16SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:發(fā)射器 驅(qū)動器/接收器數(shù):4/0 規(guī)程:RS422，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ISL32273EFBZ-T | 功能描述:IC RCVR RS485/422 QD ESD 16SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:發(fā)射器 驅(qū)動器/接收器數(shù):4/0 規(guī)程:RS422，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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