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| 型號(hào)： | ISL41387IRZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 9/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX DUAL PROTOCAL ESD 40-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 2/2 |
| 規(guī)程： | RS232，RS422，RS485 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN 裸露焊盤（6x6） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ISL41387IRZ-TDKR |
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17
FN6201.3
November 21, 2007
Note that the loopback mode uses an additional set of
receivers, as shown in “Typical Operating Circuit” on page 6.
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
ISL41387 (QFN Package) Special Features
Logic Supply (VL Pin)
The ISL41387 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “l(fā)ogic” devices such as UARTs, ASICs,
and
μcontrollers, and today most of these devices use power
supplies significantly lower than 5V. Thus, a 5V output level
from a 5V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
the logic device’s low VOH might not exceed the VIH of a 5V
powered dual protocol input. Connecting the VL pin to the
power supply of the logic device (as shown in Figure 11)
and reduces the Tx and control input switching points to
values compatible with the logic device output levels.
Tailoring the logic pin input switching points and output levels
to the supply voltage of the UART, ASIC, or
μcontroller
eliminates the need for a level shifter/translator between the
two ICs.
VL can be anywhere from VCC down to 1.65V, but the input
switching points may not provide enough noise margin when
various VL values so the user can ascertain whether or not a
particular VL voltage meets his or her needs.
The VL supply current (IL) is typically less than 60A, as
to inputs with internal pull-up resistors (SPB, SLEW, RXEN)
being driven to the low input state. The worst case IL current
occurs when all three of the inputs are low (see Figure 19),
due to the IL through the pull-up resistors. IIL through an
by about 40A (at VL = 5V) when the SPB is high and 232
mode disables the SLEW pin pull-up (middle vs top curve).
When all three inputs are driven high, IL drops to ~10nA, so
to minimize power dissipation drive these inputs high when
unneeded (e.g., SPB isn’t used in RS-232 mode, so drive it
high).
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN pin. The active low function
also simplifies direction control, by allowing a single Tx/Rx
direction control line. If the active high RXEN were used,
either two valuable I/O pins would be used for direction
control, or an external inverter is required between DEN and
RXEN. Figure 12 details the advantage of using the RXEN
pin. When using RXEN, ensure that RXEN is tied to GND.
RS-485 Slew Rate Limited Data Rates
The ISL81387, ISL41387 FAST speed option (SLEW = High)
utilizes Tx output transitions optimized for a 20Mbps data
rate. These fast edges may increase EMI and reflection
issues, even though fast transitions aren’t required at the
lower data rates used by many applications. With the SLEW
pin low, both product types switch to a moderately slew rate
limited output transition targeted for 460kbps (MED) data
rates. The ISL41387 (QFN version) offers an additional, slew
rate limited data rate that is optimized for 115kbps (SLOW),
and is selected when SLEW = 0 and SPB = 0 (see Table 3).
The slew limited edges permit longer unterminated
networks, or longer stubs off terminated busses, and help
FIGURE 11. USING VL PIN TO ADJUST LOGIC LEVELS
GND
RXD
TXD
VCC = +2V
UART/PROCESSOR
GND
RA
DY
VCC = +5V
ISL81387
VOH ≤ 2V
VOH = 5V
VIH ≥ 2V
ESD
DIODE
GND
RXD
TXD
VCC = +2V
UART/PROCESSOR
GND
RA
DY
VCC = +5V
ISL41387
VOH ≤ 2V
VOH = 2V
VIH = 0.9V
ESD
DIODE
VL
TABLE 5. VIH AND VIL vs VL FOR VCC = 5V
VL (V)
VIH (V)
VIL (V)
1.65V
0.79
0.50
1.8V
0.82
0.60
2.0V
0.87
0.69
2.5V
0.99
0.86
3.3V
1.19
1.05
ISL81387, ISL41387
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