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參數(shù)資料
| 型號： | ISL5123IH-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH SPDT SOT23-6 |
| 標準包裝： | 3,000 |
| 功能： | 開關(guān) |
| 電路： | 1 x SPDT |
| 導通狀態(tài)電阻： | 30 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 12 V |
| 電流 - 電源： | 100pA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 帶卷 (TR) |
7
FN6022.6
November 17, 2004
COM ON Leakage Current,
ICOM(ON)
V
+ = 13V, VCOM = 1V, 12V, or VNO or VNC = 1V, 12V,
or floating, (Note 7)
25
-0.2
-
0.2
nA
Full
-10
-
10
nA
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VNO or VNC = 10V, RL =1k, CL = 35pF, VIN = 0 to 4V
25
-
25
35
ns
Full
-
35
55
ns
Turn-OFF Time, tOFF
VNO or VNC = 10V, RL =1k, CL = 35pF, VIN = 0 to 4V
25
-
17
30
ns
Full
-
26
50
ns
Break-Before-Make Time Delay
(ISL5122, ISL5123), tD
RL = 300, CL = 35pF, VNO or VNC = 10V,
VIN = 0 to 4V
Full
0
2
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0
25
-
5
15
pC
OFF Isolation
RL = 50, CL = 5pF, f = 1MHz
25
-
76
-
dB
Crosstalk (Channel-to-Channel)
25
-
-105
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
-
63
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
25
-
8
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
8
-
pF
COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, ISL5120/1/2
25
-
21
-
pF
f = 1MHz, VNO or VNC = VCOM = 0V, ISL5123
25
-
28
-
pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13V, VIN = 0V or V+, all channels on or off
Full
-1
-
1
A
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Full
-
0.8
V
Input Voltage High, VINH
ISL5120CX only
Full
2.9
-
V
Input Voltage High, VINH
Full
4
3
-
V
Input Current, IINH, IINL
V+ = 13V, VIN = 0V or V+
Full
-1
-
1
A
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
(NOTE 6)
MIN
TYP
(NOTE 6)
MAX
UNITS
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
50%
tr < 20ns
tf < 20ns
tOFF
90%
3V OR 4V
0V
VNO
0V
tON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
VOUT
VOUT
V(NO or NC)
RL
RL R ON
()
+
------------------------------
=
SWITCH
INPUT
LOGIC
INPUT
VOUT
RL
CL
COM
NO or NC
IN
1k
35pF
GND
V+
C
ISL5120, ISL5121, ISL5122, ISL5123
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