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參數(shù)資料
| 型號： | ISL54061EVAL1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 15/15頁 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL54061 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，模擬開關(guān) |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL54061 |
| 主要屬性： | 2 x SPST 模擬開關(guān) |
| 次要屬性： | 1.8 V ~ 6.5 V 電源 |
| 已供物品： | 板 |
9
FN6580.2
November 3, 2009
Detailed Description
The ISL54060 and ISL54061 are bidirectional, dual single
pole-single throw (SPST) analog switches that offers precise
switching from a single 1.8V to 6.5V supply with low
ON-resistance (0.83
Ω) and high speed operation
(tON =55ns, tOFF = 18ns). The device is especially well
suited for portable battery powered equipment due to its low
operating supply voltage (1.8V), low power consumption
(8nA), and a tiny 1.8x1.4mm
TQFN package or a 3x3mm
TDFN package. The low ON-resistance and rON flatness
provide very low insertion loss and signal distortion for
applications that require signal switching with minimal
interference by the switch.
The ISL54060 is a normally open (NO) SPST analog switch.
The ISL54061 is a normally closed (NC) SPST analog
switch.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. The ISL54060 and
ISL54061 contains ESD protection diodes on each pin of the
IC (see Figure 7). These diodes connect to either a +Ring or
-Ring for ESD protection. To prevent forward biasing the
ESD diodes to the +Ring, V+ must be applied before any
input signals, and the input signal voltages must remain
between recommended operating range.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a logic pin or switch terminal goes
above the V+ rail.
Logic inputs can be protected by adding a 1k
Ω resistor in
series with the logic input (see Figure 7). The resistor limits
the input current below the threshold that produces
permanent damage.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch. Connecting external
Schottky diodes to the signal pins will shunt the fault current
to the V+ supply instead of through the internal ESD diodes
thereby protecting the switch. These Schottky diodes must
be sized to handle the expected fault current..
FIGURE 5. CROSSTALK TEST CIRCUIT
FIGURE 6. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
0V OR V+
ANALYZER
V+
C
NO1 OR NC1
SIGNAL
GENERATOR
RL
GND
INX
COM1
50
Ω
NC
COM2
NC2 OR NO2
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
*50
Ω SOURCE
V+
C
GND
NO OR NC
COM
IN
IMPEDANCE
ANALYZER
0V OR V+
COM is connected to NO or NC
during ON capacitance measurement.
GND
VCOMx
VNCx
V+
LOGIC
INPUTS
VNOx
-RING
+RING
CLAMP
1k
Ω
OR
FIGURE 7. OVERVOLTAGE PROTECTION
ISL54060, ISL54061
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| ISL54061IRTZ | 功能描述:IC SWITCH DUAL SPST 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54061IRTZ-T | 功能描述:IC SWITCH DUAL SPST 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54061IRUZ-T | 功能描述:IC SWITCH DUAL SPST 10UTQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54062 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Negative Signal Swing, Sub-ohm, Dual SPDT |
| ISL54062_0911 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Negative Signal Swing, Sub-ohm, Dual SPDT |
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