10 FN6969.1 September 19, 2013 The HS1 channel switches are active (turned ON) whenever the SEL voltage is logic “0”(Low) and the OE/A" />
參數(shù)資料
型號: ISL54224IRUZ-T
廠商: Intersil
文件頁數(shù): 2/18頁
文件大小: 0K
描述: IC MULTIPLEXER DUAL 2:1 10TQFN
標準包裝: 3,000
功能: 多路復用器
電路: 2 x 2:1
導通狀態(tài)電阻: 20 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.25 V
電流 - 電源: 45µA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-UFQFN
供應商設備封裝: 10-UTQFN(1.8x1.40)
包裝: 帶卷 (TR)
ISL54224
10
FN6969.1
September 19, 2013
The HS1 channel switches are active (turned ON) whenever the
SEL voltage is logic “0”(Low) and the OE/ALM voltage is logic
“1”(High).
The HS2 channel switches are active (turned ON) whenever the
SEL voltage is logic “1” (High) and the OE/ALM voltage is logic
“1” (High).
Overvoltage Protection (OVP)
The maximum normal operating signal range for the HSx switches is
from 0V to 3.6V. For normal operation, the signal voltage should not be
allowed to exceed this voltage range or go below ground by more than
-0.3V.
However, in the event that a positive voltage > 3.8V (typ) to
5.25V, such as the USB 5V VBUS voltage, gets shorted to one or
both of the COM+ and COM- pins or a negative voltage < -0.5V
(typ) to -5V gets shorted to one or both of the COM pins, the
ISL54224 has OVP circuitry to detect the overvoltage condition
and open the SPDT switches to prevent damage to the USB
down-stream transceivers connected at the signal pins (HS1D-,
HS1D+, HS2D-, HS2D+).
The OVP and power-off protection circuitry allows the COM pins
(D-, D+) to be driven up to 5.25V while the VDD supply voltage is
in the range of 0V to 5.25V. In this condition the part draws
<100A of ICOMx and IDD current and causes no stress to the IC.
In addition, the SPDT switches are OFF and the fault voltage is
isolated from the other side of the switch.
The OE/ALM pin gets internally pulled low whenever the part
senses an overvoltage condition. The pin must be externally
pulled “High” with a pull-up resistor and monitored for a “Low” to
determine when an overvoltage condition has occurred.
External VDD Series Resistor to Limit IDD
Current during Negative OVP Condition
A 100 to 1k resistor in series with the VDD pin (see Figure 9) is
required to limit the IDD current draw from the system power
supply rail during a negative OVP fault event.
With a negative -5V fault voltage at both com pins, the graph in
Figure 10 shows the IDD current draw for different external
resistor values for supply voltages of 2.7V, 3.6V, and 5.25V. Note:
With a 500 resistor the current draw is limited to around 5mA.
When the negative fault voltage is removed the IDD current will
return to it’s normal operation current of 25A to 45A.
The series resistor also provides improved ESD and latch-up
immunity. During an overvoltage transient event (such as occurs
during system level IEC 61000 ESD testing), substrate currents
can be generated in the IC that can trigger parasitic SCR
structures to turn ON, creating a low impedance path from the
VDD power supply to ground. This will result in a significant
amount of current flow in the IC, which can potentially create a
latch-up state or permanently damage the IC. The external VDD
resistor limits the current during this over-stress situation and
has been found to prevent latch-up or destructive damage for
many overvoltage transient events.
Under normal operation, the low microamp IDD current of the IC
produces an insignificant voltage drop across the series resistor
resulting in no impact to switch operation or performance.
ISL54224 Operation
The following will discuss using the ISL54224 shown in the
POWER
The power supply connected at the VDD pin provides the DC bias
voltage required by the ISL54224 part for proper operation. The
ISL54224 can be operated with a VDD voltage in the range of
2.7V to 5.25V.
For lowest power consumption you should use the lowest VDD
supply.
A 0.01F or 0.1F decoupling capacitor should be connected
from the VDD pin to ground to filter out any power supply noise
from entering the part. The capacitor should be located as close
to the VDD pin as possible.
In a typical application, VDD will be in the range of 2.8V to 4.3V
and will be connected to the battery or LDO of the portable
media device.
FIGURE 9. VDD SERIES RESISTOR TO LIMIT IDD CURRENT DURING
NEGATIVE OVP AND FOR ENHANCED ESD AND
LATCH-UP IMMUNITY
FIGURE 10. NEGATIVE OVP IDD CURRENT vs RESISTOR VALUE vs
VSUPPLY
SEL
D+
D-
GND
OVP
LOGIC
VDD
OE/ALM
HSD1+
100 to 1k
VSUPPLY
C
PROTECTION
RESISTOR
HSD1-
IDD
-5V
FAULT
VOLTAGE
PULLED “LOW”
TO INDICATE OVP
HSD2+
HSD2-
100k
VSUPPLY
0
5
10
15
20
25
100
200
300
400
500
600
700
800
900
1k
RESISTOR ()
I DD
(mA)
VCOM+ = VCOM- = -5V
2.7V
3.6V
5.25V
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