14 FN7811.2 June 6, 2013 an effective means of turning that into a low sourcing current condition with minimal impact to the desired s" />
參數(shù)資料
型號: ISL55210IRTZ-T7
廠商: Intersil
文件頁數(shù): 6/18頁
文件大?。?/td> 0K
描述: IC OPAMP DIFF 2200MHZ LP 16TQFN
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: 差分
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 5600 V/µs
增益帶寬積: 4GHz
-3db帶寬: 2.2GHz
電流 - 輸入偏壓: 50µA
電壓 - 輸入偏移: 100µV
電流 - 電源: 35mA
電流 - 輸出 / 通道: 45mA
電壓 - 電源,單路/雙路(±): 3 V ~ 4.2 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-TQFN(3x3)
包裝: 帶卷 (TR)
ISL55210
14
FN7811.2
June 6, 2013
an effective means of turning that into a low sourcing current
condition with minimal impact to the desired signal path
operation when enabled.
The very low internal power dissipation of the ISL55210, along
with the excellent thermal conductivity of the QFN package when
the exposed metal pad is tied to a conductive plate, reduces the
TJ rise above ambient to very modest levels. Assuming a nominal
115mW dissipation and using the +63°C/W measured thermal
impedance from Junction to ambient, gives a rise of only
0.12 * 63 = +7.6°C. Operation at elevated ambient
temperatures is easily supported given this very low internal rise
to junction.
The maximum internal junction temperatures would occur at
maximum supply voltage, +85°C maximum ambient operating,
and where the QFN exposed pad is not tied to a conductive layer.
Where the QFN must be mounted with an insulating layer to the
exposed metal plate, such as in a split supply application, device
measurements show an increased thermal impedance junction
to ambient of +120°C/W. Using this, and a maximum quiescent
internal power on 4.5V absolute maximum, which shows 45mA
for +85°C maximum operating ambient from Figure 27, we get
4.5V * 45mA * +120°C/W = +24°C rise above +85°C or
approximately +109°C operating TJ maximum - still well below
the specified Absolute Maximum operating junction temperature
of +135°C.
Noise Analysis
The decompensated voltage feedback design of the ISL55210
provides very low input voltage and current noise. While a
detailed noise model using arbitrary external resistors can be
made, most applications will have a balanced feedback network
with the two RF (feedback) resistors equal and the two RG (gain)
resistors equal. Figure 33 shows the test circuit used to measure
the output noise with the noise terms detailed. The aim here was
to measure the output noise with two different resistor settings
to extract out a model for the input referred En and In terms for
just the amplifier itself.
With equal feedback and gain resistors, the total output noise
expression becomes very simple. This is:
The NG term in Equation 1 is the Noise Gain = 1 + RF/RG. The
last term in Equation 1 captures both the RF and RG resistor
noise terms. If we assume a 50 source in Test Circuit #1, the
total RG resistor value will be 100 as that 50 will come
through the transformer to look like a 50 source on each side.
This gives a lower noise gain (3V/V) than signal gain (4V/V) for
just the amplifier. The total gain in Test Circuit #1 is still
approximately 1.4 * 4 = 5.6V/V including the transformer step
up.
Putting in NG = 3, RF = 200, RG = 100 with the ISL55210
noise terms of eni = 0.85nV/√Hz and In = 5pA/√Hz into Equation 1
(4kT = 1.6E - 20J) gives a total output differential noise
voltage = 5.26nV/√Hz. Input referring this to the input side of the
transformer of Test Circuit #1 gives an input referred spot noise
of only 0.88nV/√Hz. This extremely low input referred noise is a
combination of low amplifier noise terms and the effect of the
input transformer configuration.
Driving Cap and Filter Loads
Most applications will drive a resistive or filter load. The
ISL55210 is robust to direct capacitive load on the outputs up to
approximately 10pF. For frequency response flatness, it is best to
avoid any output pin capacitance as much as possible - as that
capacitance increases, the high frequency portion of the
ISL55210 (>1GHz) response will start to show considerable
peaking. No oscillations were observed up through 10pF load on
each output.
For AC coupled applications, an output network that is a small
series resistor (10 to 50) into a blocking cap is preferred. This
series resistor will isolate parasitic capacitance to ground from
the internally closed loop output stage of the amplifier and
de-queue the self resonance of the blocking capacitors. Once the
output stage sees this resistive element first, the remaining part
of the filter design can be done without fear of amplifier
instability.
Driving ADCs
Many of the intended applications for the ISL55210 are as a low
power, very high dynamic range, last stage interface to high
performance ADCs. The lowest power ADCs, such as the
ISLA112P50 shown on the front page, include an innovative
"Femto-Charge" internal architecture that eliminates op amps
from the ADC design and only passes signal charge from stage to
stage. This greatly reduces the required quiescent power for
these ADCs but then that signal charge has to be provided by the
external circuit at the two input pins. This appears on an ADC like
the ISLA112P50 as a clock rate dependent common mode input
current that must be supplied by the interface circuit. At
500MHz, this DC current is 1.3mA on each input for the
Most interfaces will also include an interstage noise power
bandlimiting filter between the amplifier and the ADC. This filter
needs to be designed considering the loading of the amplifier,
FIGURE 33. NOISE MODEL AND TEST CIRCUIT
1F
ISL55210
+
-
eO
RF
RG
1F
*
in
*
4kTRg
*
in
*
4kTRf
*
eni
1F
1:1
ADT1-1WT
50
25
(EQ. 1)
e
0
e
ni
NG
()
2
+
i
nRf
()
2
24kTR
f NG
()
+
=
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