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參數(shù)資料
| 型號： | ISL59885 |
| 廠商： | Intersil Corporation |
| 英文描述： | Auto-Adjusting Sync Separator for HD and SD Video(HD和SD視頻專用自動調(diào)節(jié)同步信號分離器) |
| 中文描述： | 自動調(diào)整同步分離器的高清和標(biāo)清視頻（高清和標(biāo)清視頻專用自動調(diào)節(jié)同步信號分離器） |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 361K |
| 代理商： | ISL59885 |
11
FN7442.6
August 15, 2007
Applications Information
Video In
The “Simplified Block Diagram” is shown on page 12.
An AC coupled video signal is input to Video In pin 2 via C
1
,
nominally 0.1μF. Clamp charge current will prevent the
signal on pin 2 from going any more negative than Sync Tip
Ref, about 1.5V. This charge current is nominally about 1mA.
A clamp discharge current of about 10μA is always
attempting to discharge C
1
to Sync Tip Ref, thus charge is
lost between sync pulses that must be replaced during sync
pulses. The droop voltage that will occur can be calculated
from IT = CV, where V is the droop voltage, I is the discharge
current, t is the time between sync pulses (sync period -
sync tip width), and C is C
1
.
An NTSC video signal has a horizontal frequency of
15.73kHz, and a sync tip width of 4.7μs. This gives a period
of 63.6μs and a time t = 58.9μs. The droop voltage will then
be V = 5.9mV. This is less than 2% of a nominal sync tip
amplitude of 286mV. The charge represented by this droop
is replaced in a time given by t = CV/I, where I = clamp
charge current = 5.3mA. Here t = 590ns, about 12% of the
sync pulse width of 4.7μs. It is important to choose C
1
large
enough so that the droop voltage does not approach the
switching threshold of the internal comparator.
Composite Sync
The Composite Sync output is simply a reproduction of the
input signal with the active video removed. The sync tip of
the Composite video signal is clamped to 1.5V at pin 2 and
then slices at 70mV above the sync tip reference. The output
signal is buffered out to pin 1. When loss of sync, the
Composite Sync output is held low.
Vertical Sync
A low-going Vertical Sync pulse is output during the start of
the vertical cycle of the incoming video signal. The vertical
cycle starts with a pre-equalizing phase of pulses with a duty
cycle of about 93%, followed by a vertical serration phase
that has a duty cycle of about 15%. Vertical Sync is clocked
out of the ISL59885 on the first rising edge during the
vertical serration phase. In the absence of vertical serration
pulses, a vertical sync pulse will be forced out after the
vertical sync default delay time, approximately 60μs after the
last falling edge of the vertical equalizing phase.
Horizontal Sync
The horizontal circuit senses the composite sync edges and
produces the true horizontal pulses of nominal width 5.2μs.
The leading edge is triggered from the leading edge of the
input H sync with the same propagation delay as composite
sync. The half line pulses present in the input signal during
vertical blanking are removed with an internal 2H line
eliminator circuit. This is a circuit that inhibits horizontal
output pulses until 75% of the line time is reached, then the
horizontal output operation is enabled again. Any signals
present on the I/P signal after the true H sync will be ignored,
thus the horizontal output will not be effected by MacroVision
copy protection. When there is a loss of sync, the Horizontal
Sync output is held high.
C
SET
An external C
SET
capacitor connected from CSET pin 6 to
ground. C
SET
capacitor should be a X7R grade or better as
the Y5U general use capacitors may be too leaky and cause
faulty operation. The C
SET
capacitor should be very close to
the CSET pin to reduce possible board leakage. 56nF is
recommended. The “C
SET
Bias Circuit” is shown on
page 12. The C
SET
capacitor rectifies a 5μs pulse current
and creates a voltage on C
SET
. The C
SET
voltage is
converted to bias current for H
SYNC
and V
SYNC
timing.
Chroma Filter
A chroma filter is suggested to increase the S/N ratio of the
incoming video signal. Use of the optional chroma filter is
shown in Figure16. It can be implemented very simply and
inexpensively with a series resistor of 100
Ω
and a capacitor
of 570pF, which gives a single pole roll-off frequency of
about 2.79MHz during NTSC or PAL. This sufficiently
attenuates the 3.58MHz (NTSC) or 4.43MHz (PAL) color
burst signal, yet passes the approximately 15kHz sync
signals without appreciable attenuation. During HDTV, the
transistor turns off and a 100pF capacitor is left to filter any
noise present at the input. A chroma filter will increase the
propagation delay from the composite input to the outputs.
HD-Detect
High definition video is flagged by HD going low when the
input horizontal frequency is greater than 20kHz.
ISL59885
0.1μF
100
Ω
R
F
C
F2
470pF
VIDEO IN
CHROMA FILTER
1
2
3
4
8
7
6
5
HD
10k
Ω
MMBT3904
GND
V
DD
C
SET
C
VIN
C
SYNC
H
OUT
V
SYNC
C
F
100pF
FIGURE 16. OPTIONAL CHROMA FILTER
ISL59885
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL59885_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Auto-Adjusting Sync Separator for HD and SD Video |
| ISL59885_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Auto-Adjusting Sync Separator for HD and SD Video |
| ISL59885IS | 功能描述:IC SEPARATOR VID SYNC AUTO 8SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ISL59885IS-EVAL | 制造商:Intersil Corporation 功能描述:EVAL KIT FOR AUTO-ADJUSTING SYNC SEPARATOR FOR HD AND SD VID - Bulk |
| ISL59885ISR5218 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Auto-Adjusting Sync Separator for HD and SD Video |
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