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參數(shù)資料
| 型號： | ISL6269CRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Single Phase PWM Controller for Mobile Graphical Processing Unit (GPU) |
| 中文描述： | SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PQCC16 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, PLASTIC, MO-220-VGGC, QFN-16 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 395K |
| 代理商： | ISL6269CRZ-T |
11
FN9177.0
June 14, 2005
Diode Emulation
Positive inductor current can flow
from
the source of the
high-side MOSFET or
from
the drain of the low-side
MOSFET. Negative inductor current flows
into
the drain of
the low-side MOSFET. When the low-side MOSFET
conducts positive inductor current, the phase voltage will be
negative with respect to the GND pin. Conversely, when the
low-side MOSFET conducts negative inductor current, the
phase voltage will be positive with respect to the GND pin.
Negative inductor current occurs when the output load
current is less than the inductor ripple current.
The ISL6269 can be configured to operate in forced-
continuous-conduction-mode (FCCM) or in diode-emulation-
mode (DEM), which can improve light-load efficiency. In
FCCM, the controller always operates as a synchronous
rectifier, switching the low-side MOSFET regardless of the
polarity of the output inductor current. In DEM, the low-side
MOSFET is disabled during negative current flow from the
output inductor. DEM is permitted when the FCCM pin is
pulled low, and disabled when pulled high.
When DEM is permitted, the converter will automatically
select FCCM or DEM according to load conditions. If positive
PHASE pin voltage is measured for eight consecutive PWM
pulses, then the converter will enter diode-emulation mode
on the next PWM cycle. If a negative PHASE pin voltage is
measured, the converter will exit DEM on the following PWM
pulse. An audio filter is incorporated into the PWM
generation circuitry that prevents the switching frequency
from entering the audible spectrum at low load conditions.
Overcurrent and Short-Circuit Protection
When an OCP or SCP fault is detected, the ISL6269
overcurrent and short-circuit protection circuit will pull the
PGOOD pin low and latch off the converter. The fault will
remain latched until the EN pin is pulled below V
ENF
or if the
voltage at the VIN pin is reduced to the extent that V
CC
has
fallen below the POR V
CCF
threshold. Selecting the
appropriate value of resistor R
SEN
programs the OCP
threshold. The resistor R
SEN
is connected from the ISEN pin
to the PHASE pin. The PHASE pin is connected to the drain
terminal of the low-side MOSFET.
The OCP circuit measures positive-flowing, peak-current
through the output inductor, not the DC current flowing from
the converter to the load. The low-side MOSFET drain
current is assumed to be equal to the positive output
inductor current when the high-side MOSFET is turn off.
Current briefly conducts through the low-side MOSFET body
diode until the LG driver goes high. The peak inductor
current develops a voltage across the r
DS(ON)
of the low-
side MOSFET just as if it were a discrete current-sense
resistor. An OCP fault will occur when the ISEN pin has
measured more than the OCP threshold current I
OC,
on
consecutive PWM pulses, for a period exceeding 20μs. It
does not matter how many PWM pulses are measured
during the 20μs period. If a measurement falls below I
OC
before 20μs has elapsed, then the timer is reset to zero. An
SCP fault will occur when the ISEN pin has measured more
than the short-circuit threshold current I
SC,
in less than
10μs, on consecutive PWM pulses. The relationship
between I
D
and I
SEN
can be written as:
I
–
SEN
R
SEN
I
–
D
r
DS ON
)
=
The value of RSEN can then be written as:
I
OC
Where:
- R
SEN
(
) is the resistor used to program the over-
current setpoint
- I
SEN
is the current sense current that is sourced from
the ISEN pin
- I
OC
is the I
SEN
threshold current value sourced from the
ISEN pin that will activate the OCP circuit
- I
FL
is the maximum continuous DC load current
- I
PP
is the inductor peak-to-peak ripple current
- OC
SP
is the desired overcurrent setpoint expressed as
a multiplier relative to I
FL
Overvoltage
When an OVP fault is detected, the ISL6269 overvoltage
protection circuit will pull the PGOOD pin low and latch off
the converter. The fault will remain latched until the EN pin is
pulled below V
ENF
or if the voltage at the VIN pin is reduced
to the extent that V
CC
has fallen below the POR V
CCF
threshold.
When the voltage at the FB pin relative to the GND pin, has
exceeded the rising overvoltage threshold V
OVR
, the
converter will latch off however, the LG driver output will stay
high, forcing the low-side MOSFET to pull down the output
voltage of the converter. The low-side MOSFET will continue
to pull down the output voltage until the voltage at the FB pin
relative to the GND pin, has decayed below the falling
overvoltage threshold V
OVF,
at which time the LG driver
output is driven low, forcing the low-side MOSFET off. The
LG driver output will continue to switch on at V
OVR
and
switch off at V
OVF
until the EN pin is pulled below V
ENF
or if
the voltage at the VIN is reduced to the extent that V
CC
has
fallen below the POR V
CCF
threshold.
(EQ. 3)
R
SEN
I
----------------------------------------------------------------------------
--------
+
OC
r
(
)
=
(EQ. 4)
ISL6269
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