參數(shù)資料
型號(hào)： ISL6308IRZ-T
廠商： INTERSIL CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
中文描述： SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PQCC40
封裝： 6 X 6 MM, ROHS COMPLIANT, PLASTIC, MO-220VJJD-1, QFN-40
文件頁(yè)數(shù)： 11/27頁(yè)
文件大?。?/td> 765K
代理商： ISL6308IRZ-T
11
FN9208.2
October 19, 2005
Current Sampling
In order to realize proper current balance, the currents in
each channel must be sampled every switching cycle. This
sampling occurs during the forced off-time, following a PWM
transition low. During this time the current sense amplifier
uses the ISEN inputs to reproduce a signal proportional to
the inductor current, I
L
. This sensed current, I
SEN
, is simply
a scaled version of the inductor current. The sample window
opens exactly 1/6 of the switching period, t
SW
, after the
PWM transitions low. The sample window then stays open
the rest of the switching cycle until PWM transitions high
again, as illustrated in Figure 4.
The sampled current, at the end of the t
SAMPLE
, is
proportional to the inductor current and is held until the next
switching period sample. The sampled current is used only
for channel current balance.
The ISL6308 supports MOSFET r
DS(ON)
current sensing to
sample each channel’s current for channel current balance.
The internal circuitry, shown in Figure 5 represents channel
n of an N-channel converter. This circuitry is repeated for
each channel in the converter, but may not be active
depending on the status of the PVCC3 and PVCC2 pins, as
described in the
PWM Operation
section.
The ISL6308 senses the channel load current by sampling
the voltage across the lower MOSFET r
DS(ON)
, as shown in
Figure 5. A ground-referenced operational amplifier, internal
to the ISL6308, is connected to the PHASE node through a
resistor, R
ISEN
. The voltage across R
ISEN
is equivalent to
the voltage drop across the r
DS(ON)
of the lower MOSFET
while it is conducting. The resulting current into the ISEN pin
is proportional to the channel current, I
L
. The ISEN current is
sampled and held as described in the
Current Sampling
section. From Figure 5, the following equation for I
n
is
derived where I
L
is the channel current.
r
)
ISEN
Output Voltage Setting
The ISL6308 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the REF1, REF0 pins. The DAC decodes the 2-bit logic
signals into one of the discrete voltages shown in Table 1.
Each REF0 and REF1 pins are pulled up to an internal 1.2V
voltage by weak current sources (40
μ
A current, decreasing
to 0 as the voltage at the REF0, REF1 pins varies from 0 to
the internal 1.2V pull-up voltage). External pull-up resistors
or active-high output stages can augment the pull-up current
sources, up to a voltage of 5V. The DAC pin must be
connected to REF pin through a 1-5k
resistor and a filter
capacitor (0.022
μ
F) is connected between REF and GND.
The ISL6308 accommodates the use of external voltage
reference connected to REF pin if a different output voltage
is required. The DAC voltage must be set at least as high as
the external reference. The error amp internal noninverting
input is the lower of REF or (DAC +300mV).
A third method for setting the output voltage is to use a
resistor divider (R
P1
, R
S1
) from the output terminal (V
OUT
)
FIGURE 3. CHANNEL 1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
÷
N
I
AVG
I
3
I
2
Σ
-
+
+
-
+
-
f(s)
PWM1
I
1
V
COMP
SAWTOOTH SIGNAL
I
ER
NOTE: Channel 2 and 3 are optional.
FILTER
TO GATE
CONTROL
LOGIC
FIGURE 4. SAMPLE AND HOLD TIMING
TIME
PWM
I
L
I
SEN
SWITCHING PERIOD
SAMPLING PERIOD
OLD SAMPLE
CURRENT
NEW SAMPLE
CURRENT
FIGURE 5. ISL6308 INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY FOR CURRENT BALANCE
I
n
ISEN
IL
x
(
)
rRISEN
=
-
+
ISEN(n)
R
ISEN
SAMPLE
&
HOLD
ISL6308 INTERNAL CIRCUIT
EXTERNAL CIRCUIT
V
IN
CHANNEL N
UPPER MOSFET
CHANNEL N
LOWER MOSFET
-
IL
x
rDS ON
+
(
)
I
L
I
n
I
L
-R
=
(EQ. 3)
ISL6308
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