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參數(shù)資料
| 型號： | ISL6316CRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Quadruple 2-Input Exclusive-OR Gates 14-PDIP -40 to 85 |
| 中文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, PLASTIC, MO-220-VJJD-2, QFN-40 |
| 文件頁數(shù)： | 21/29頁 |
| 文件大?。?/td> | 838K |
| 代理商： | ISL6316CRZ-T |
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21
FN9227.0
August 31, 2005
The NTC resistance at the set point T2 and release point T1
of VR_FAN signal can be calculated as:
With the NTC resistance value obtained from Equations17 &
18, the temperature value T2 and T1 can be found from the
NTC datasheet.
Temperature Compensation
ISL6316 supports inductor DCR sensing, MOSFET R
DS(ON)
sensing, or resistive sensing techniques. Both inductor DCR
and MSOFET R
DS(ON)
have the positive temperature
coefficient, which is about +0.38%/°C. Because the voltage
across inductor or MOSFET is sensed for the output current
information, the sensed current has the same positive
temperature coefficient as the inductor DCR or MOSFET
R
DS(ON)
.
In order to obtain the correct current information, there should
be a way to correct the temperature impact on the current
sense component. ISL6316 provides two methods: integrated
temperature compensation and external temperature
compensation.
Integrated Temperature Compensation
When TCOMP voltage is equal or greater than Vcc/15,
ISL6316 will utilize the voltage at TM and TCOMP pins to
compensate the temperature impact on the sensed current.
The block diagram of this function is shown in Figure 17.
FIGURE 14. BLOCK DIAGRAM OF THERMAL MONITORING
FUNCTION
0.28V
CC
0.33V
CC
o
c
R
TM1
R
NTC
VCC
TM
VR_FAN
VR_HOT
FIGURE 15. THE RATIO OF TM VOLTAGE TO NTC
TEMPERATURE WITH RECOMMENDED PARTS
V
TM
/ V
CC
vs. Temperature
20%
30%
40%
50%
60%
70%
80%
90%
100%
0
20
40
60
80
100
120
140
Temperature (
o
C)
V
T
C
FIGURE 16. VR_HOT AND VR_FAN SIGNAL VS TM VOLTAGE
TM
VR_FAN
VR_HOT
0.39*Vcc
0.33*Vcc
0.28*Vcc
Temperature
T1
T2
T3
R
NTC T2
)
1.267xR
NTC T3
)
=
(EQ. 17)
R
NTC T1
)
1.644xR
NTC T3
)
=
(EQ. 18)
FIGURE 17. BLOCK DIAGRAM OF INTEGRATED
TEMPERATURE COMPENSATION
o
c
R
TM1
R
NTC
TM
R
TC1
R
TC2
TCOMP
V
CC
Non-linear
A/D
4-bit
A/D
Droop &
Over current protection
I
1
I
2
I
3
I
4
k
i
D/A
Channel current
sense
I
sen4
I
sen3
I
sen2
I
sen1
V
CC
ISL6316
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