- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383152 > ISL6524A (Intersil Corporation) Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85 PDF資料下載
參數(shù)資料
| 型號(hào)： | ISL6524A |
| 廠商： | Intersil Corporation |
| 英文描述： | Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85 |
| 中文描述： | VRM8.5 PWM和三線性電源系統(tǒng)控制器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 453K |
| 代理商： | ISL6524A |
8
FN9064.1
April 8, 2005
The T2 to T3 time interval is dependent upon the value of
C
SS13
. The same capacitor is also responsible for the ramp-
up time of the OUT1 and OUT3 voltages. If selecting a
different capacitor then recommended in the circuit application
literature, consider the effects the different value will have on
the ramp-up time and inrush currents of the OUT1 and OUT3
outputs.
Fault Protection
All four outputs are monitored and protected against extreme
overload. The chip’s response to an output overload is
selective, depending on the faulting output.
An over-voltage on V
OUT1
output (VSEN1) disables outputs
1, 2, and 3, and latches the IC off. An under-voltage on
V
OUT4
output latches the IC off. A single over-current event
on output 1, or an under-voltage event on output 2 or 3,
increments the respective fault counters and triggers a
shutdown of outputs 1, 2, and 3, followed by a soft-start re-
start. After three consecutive fault events on either counter,
the chip is latched off. Removal of bias power resets both the
fault latch and the counters. Both counters are also reset by
a successful start-up of all the outputs.
Figure 7 shows a simplified schematic of the fault logic. The
over-current latches are set dependent upon the states of
the over-current (OC1), output 2 and 3 under-voltage (UV2,
UV3) and the soft-start signals (SS13, SS24). Window
comparators monitor the SS pins and indicate when the
respective C
SS
pins are fully charged to above 4.0V (UP
signals). An under-voltage on either linear output (VSEN2,
VSEN3, or VSEN4) is ignored until the respective UP signal
goes high. This allows V
OUT3
and V
OUT4
to increase
without fault at start-up. Following an over-current event
(OC1, UV2, or UV3 event), bringing the SS24 pin below 0.8V
resets the over-current latch and generates a soft-started
ramp-up of the outputs 1, 2, and 3.
OUT1 Over-Voltage Protection
During operation, a short across the PWM upper MOSFET
(Q1) causes V
OUT1
to increase. When the output exceeds
the over-voltage threshold of 120% of DACOUT, the over-
voltage comparator trips to set the fault latch and turns the
lower MOSFET (Q2) on as needed to regulate the output
voltage to the 120% threshold. This operation typically
results in the blow of the input fuse, subsequent discharge of
V
OUT1
.
A separate over-voltage circuit provides protection during
the initial application of power. For voltages on the VCC pin
below the power-on reset (and above ~4V), the output level
is monitored for voltages above 1.3V. Should VSEN1 exceed
this level, the lower MOSFET, Q2, is driven on.
Over-Current Protection
All outputs are protected against excessive over-currents.
The PWM controller uses the upper MOSFET’s on-
resistance, r
DS(ON)
to monitor the current for protection
against a shorted output. All linear regulators monitor their
respective VSEN pins for under-voltage to protect against
excessive currents.
Figure 8 illustrates the over-current protection with an
overload on OUT1. The overload is applied at T0 and the
FIGURE 6. SOFT-START INTERVAL
0V
10V
0V
TIME
PGOOD
SS13
V
OUT2
(1.2V)
V
OUT4
(1.8V)
T1
T2
T4
T0
T5
3.0V
V
OUT1
(1.65V)
V
OUT3
(1.5V)
VTTPG
SS24
ATX 3.3V
ATX 5V
ATX 12V
T3
FAULT
LATCH
S
R
Q
POR
COUNTER
OC1
UV4
UV2
UV3
4V
SS13
FAULT
R
FIGURE 7. FAULT LOGIC - SIMPLIFIED SCHEMATIC
SS13UP
OC
LATCH
INHIBIT1,2,3
S
R
Q
OV
4V
0.8V
SS24
SS24UP
Q
SSDOWN
COUNTER
>
S
R
Q
OC
LATCH
R
>
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL6524CBZ | VRM8.5 PWM and Triple Linear Power System Controller |
| ISL6524CB-T | VRM8.5 PWM and Triple Linear Power System Controller |
| ISL6524ACB | Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85 |
| ISL6524ACBZ | Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85 |
| ISL6524ACBZ-T | Adjustable Precision Shunt Regulator 3-SOT-89 -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6524ACB | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| ISL6524ACB-T | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| ISL6524ACBZ | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件 |
| ISL6524ACBZA-T | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件 |
| ISL6524ACBZ-T | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。