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參數(shù)資料
| 型號： | ISL6524A |
| 廠商： | Intersil Corporation |
| 英文描述： | Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85 |
| 中文描述： | VRM8.5 PWM和三線性電源系統(tǒng)控制器 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 453K |
| 代理商： | ISL6524A |
9
FN9064.1
April 8, 2005
current increases through the inductor (L
OUT1
). At time T1,
the OC1 comparator trips when the voltage across Q1 (i
D
r
DS(ON)
) exceeds the level programmed by R
OCSET
. This
inhibits outputs 1, 2, and 3, discharges the soft-start capacitor
C
SS24
with 28
μ
A current sink, and increments the counter.
Soft-start capacitor C
SS13
is quickly discharged. C
SS13
starts
ramping up at T2 and initiates a new soft-start cycle. With
OUT2 still overloaded, the inductor current increases to trip
the over-current comparator. Again, this inhibits the outputs,
but the C
SS24
soft-start voltage continues increasing to above
4.0V before discharging. Soft-start capacitor C
SS13
is, again,
quickly discharged. The counter increments to 2. The soft-
start cycle repeats at T3 and trips the over-current
comparator. The SS24 pin voltage increases to above 4.0V at
T4 and the counter increments to 3. This sets the fault latch to
disable the converter.
The three linear controllers monitor their respective VSEN
pins for under-voltage. Should excessive currents cause
VSEN3 or VSEN4 to fall below the linear under-voltage
threshold, the respective UV signals set the OC latch or the
FAULT latch, providing respective C
SS
capacitors are fully
charged. Blanking the UV signals during the C
SS
charge
interval allows the linear outputs to build above the under-
voltage threshold during normal operation. Cycling the bias
input power off then on resets the counter and the fault latch.
An external resistor (R
OCSET
) programs the over-current trip
level for the PWM converter. As shown in Figure 9, the internal
200
μ
A current sink (I
OCSET
) develops a voltage across
R
OCSET
(V
SET
) that is referenced to V
IN
. The DRIVE signal
enables the over-current comparator (OC). When the voltage
across the upper MOSFET (V
DS(ON)
) exceeds V
SET
, the over-
current comparator trips to set the over-current latch. Both
V
SET
and V
DS
are referenced to V
IN
and a small capacitor
across R
OCSET
helps V
OCSET
track the variations of V
IN
due
to MOSFET switching. The over-current function will trip at a
peak inductor current (I
PEAK)
determined by:
The OC trip point varies with MOSFET’s rDS(ON)
temperature variations. To avoid over-current tripping in the
normal operating load range, determine the ROCSET
resistor value from the equation above with:
1. The maximum r
DS(ON)
at the highest junction temperature
2. The minimum I
OCSET
from the specification table
3. Determine I
PEAK
for I
PEAK
> I
OUT(MAX)
+ (
I)/2,
where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
OUT1 Voltage Program
The output voltage of the PWM converter is programmed to
discrete levels between 1.050V and 1.825V. This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, since they are internally
pulled to the VAUX pin through 5k
resistors. Changing the
VID inputs during operation is not recommended and could
toggle the PGOOD signal and exercise the over-voltage
protection. The output voltage program is Intel VRM8.5
compatible.
FIGURE 8. OVER-CURRENT OPERATION
S
0A
0V
2V
4V
TIME
T1
T2
T3
T0
T4
F
0V
10V
FAULT
REPORTED
COUNT
= 2
COUNT
= 3
OVERLOAD
APPLIED
COUNT
= 1
S
I
PEAK
=
I
---------------------------------------------------
R
×
r
DS ON
)
V
SET
FIGURE 9. OVER-CURRENT DETECTION
UGATE
OCSET
PHASE
OC
+
-
GATE
CONTROL
VCC
200
μ
A
V
DS
i
D
R
OCSET
V
IN
= +5V
OVER-CURRENT TRIP:
VDS
I
OCSET
+
+
PWM
DRIVE
VPHASE
VOCSET
VIN
VIN
VDS
VSET
–
=
–
=
iD
rDS ON
(
)
×
IOCSET
ROCSET
×
>
VSET
>
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