• 參數(shù)資料
    型號: ISL6556BCB
    廠商: INTERSIL CORP
    元件分類: 穩(wěn)壓器
    英文描述: PWM Controller with Wide Input Range 8-SOIC -40 to 125
    中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO28
    封裝: PLASTIC, MS-013AE, SOIC-28
    文件頁數(shù): 15/24頁
    文件大?。?/td> 692K
    代理商: ISL6556BCB
    15
    FN9097.4
    December 28, 2004
    on-the-fly VID changes in a controlled manner. Supervising
    the safe output voltage transition within the DAC range of the
    processor without discontinuity or disruption is a necessary
    function of the core-voltage regulator.
    The ISL6556B checks the VID inputs six times every
    switching cycle. If the VID code is found to have changed,
    the controller waits half of a complete cycle before executing
    a 12.5mV change. If during the half-cycle wait period, the
    difference between DAC level and the new VID code
    changes sign, no change is made. If the VID code is more
    than 1 bit higher or lower than the DAC (not recommended),
    the controller will execute 12.5mV changes six times per
    cycle until VID and DAC are equal. It is for this reason that it
    is important to carefully control the rate of VID stepping in 1-
    bit increments.
    In order to ensure the smooth transition of output voltage
    during VID change, a VID step change smoothing network is
    required for an ISL6556B based voltage regulator. This
    network is composed by a 1k
    internal resistor between the
    output of DAC and the C
    REF
    between REF pin to ground.
    The selection of C
    REF
    is based on the time duration for 1 bit
    VID change and the allowable delay time.
    Assuming the microprocessor controls the VID change at 1
    bit every T
    VID
    , the relationship between C
    REF
    and T
    VID
    is
    given by Equation 9.
    As an example, for
    a VID step change rate of 5
    μ
    s per bit, the
    value of C
    REF
    is 22nF based on Equation 9.
    Temperature Compensation
    The MOSFET r
    DS(ON)
    varies in proportion to varying
    temperature. This means that a circuit using r
    DS(ON)
    to
    sense channel current is subject to a corresponding error in
    current measurement. In order to compensate for this
    temperature-related error, a temperature compensation
    circuit is provided within ISL6561. This circuit senses the
    internal IC temperature and, based on a resistor-selectable
    scaling factor, adjust the droop current flow to the FB pin.
    When the TCOMP resistor is properly selected, the droop
    current can accurately represent the load current to achieve
    a linear, temperature-independant load line.
    The value of the Tcomp resistor can be determined using
    Equation 10.
    T
    TC
    In Equation 10,
    K
    T
    is the temperature coupling coefficient
    between the ISL6561 and the lower MOSFET. It represents
    how closely the controller temperature tracks the lower
    MOSFET temperature. The value of K
    T
    is typically between
    75% and 100%. K
    TC
    is the temperature dependant
    transconductance of internal compensation circuit. Its value
    is designed as 1
    μ
    A/V/°C. The temperature coefficient of
    MOSFET
    r
    DS(ON)
    is given by . This is the ratio of the
    change in resistance and the change in temperature.
    Resistance is normalized to the value at 25°C and the value
    of is typically between 0.35%/°C and 0.50%/°C.
    α
    According to Equation 10,
    a voltage regulator with 80%
    thermal coupling coefficient between the controller and lower
    MOSFET and 0.4%
    /°C
    temperature coefficient of MOSFET
    r
    DS(ON)
    requires a 5k
    TCOMP resistor.
    Initialization
    Prior to initialization, proper conditions must exist on the
    enable inputs and VCC. When the conditions are met, the
    controller begins soft-start. Once the output voltage is within
    the proper window of operation, PGOOD asserts logic.
    Enable and Disable
    While in shutdown mode, the PWM outputs are held in a
    high-impedance state to assure the drivers remain off. The
    following input conditions must be met before the ISL6556B
    is released from shutdown mode.
    1. The bias voltage applied at VCC must reach the internal
    power-on reset (POR) rising threshold. Once this
    threshold is reached, proper operation of all aspects of
    the ISL6556B is guaranteed. Hysteresis between the
    rising and falling thresholds assure that once enabled,
    the ISL6556B will not inadvertently turn off unless the
    bias voltage drops substantially (see
    Electrical
    Specifications
    ).
    2. The ISL6556B features an enable input (EN) for power
    sequencing between the controller bias voltage and
    another voltage rail. The enable comparator holds the
    ISL6556B in shutdown until the voltage at EN rises above
    1.24V. The enable comparator has about 100mV of
    hysteresis to prevent bounce. It is important that the
    C
    REF
    0.004X T
    VID
    =
    (EQ. 9)
    (EQ. 10)
    R
    TCOMP
    ---------------------
    =
    α
    FIGURE 8. POWER SEQUENCING USING THRESHOLD-
    SENSITIVE ENABLE (EN) FUNCTION
    -
    +
    1.24V
    EXTERNAL CIRCUIT
    ISL6556B INTERNAL CIRCUIT
    EN
    +12V
    POR
    CIRCUIT
    10.7k
    1.40k
    ENABLE
    COMPARATOR
    SOFT-START
    AND
    FAULT LOGIC
    ENLL
    (ISL6556BCR ONLY)
    VCC
    ISL6556B
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