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    參數(shù)資料
    型號: ISL6557CB
    廠商: INTERSIL CORP
    元件分類: 穩(wěn)壓器
    英文描述: PWM Controller with Wide Input Voltage Range 8-PDIP -20 to 85
    中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO24
    封裝: PLASTIC, MS-013AD, SOIC-24
    文件頁數(shù): 8/17頁
    文件大?。?/td> 532K
    代理商: ISL6557CB
    8
    CURRENT SENSING
    Intersil multi-phase controllers sense current by sampling the
    voltage across the lower MOSFET during its conduction
    interval. MOSFET r
    DS(ON)
    sensing is a no-added-cost
    method to sense current for load-line regulation, channel-
    current balance, module current sharing, and overcurrent
    protection. If desired, an independent current-sense resistor
    in series with the lower-MOSFET source can serve as a
    sense element in place of the MOSFET r
    DS(ON)
    .
    The ISEN input for each channel uses a ground-referenced
    amplifier to reproduce a signal proportional to the channel
    current (Figure 4). After sufficient settling time, the sensed
    current is sampled, and the sample is used for current
    balance, load-line regulation and overcurrent protection. The
    ISL6557 samples channel current once each cycle. Figure 4
    shows how the sampled current, I
    n
    , is created from the
    channel current I
    L
    . The circuitry in Figure 4 represents the
    current measurement and sampling circuitry for channel n in
    an N-channel converter. This circuitry is repeated for each
    channel in the converter but may not be active in channels 3
    and 4 depending on the particular implementation (see
    PWM
    Operation
    ).
    CHANNEL-CURRENT BALANCE
    Another benefit of multi-phase operation is the thermal
    advantage gained by distributing the dissipated heat over
    multiple devices and greater area. By doing this, the
    designer avoids the complexity of driving multiple parallel
    MOSFETs and the expense of using expensive heat sinks
    and exotic magnetic materials.
    In order to fully realize the thermal advantage, it is important
    that each channel in a multi-phase converter be controlled to
    deliver about the same current at any load level. Intersil
    multi-phase controllers guarantee current balance by
    comparing each channel’s current to the average current
    delivered by all channels and making an appropriate
    adjustment to each channel’s pulse width based on the
    error. Intersil’s patented current-balance method is
    illustrated in Figure 5 where the average of the 2, 3, or 4
    sampled channel currents combines with the channel 1
    sample, I
    1
    , to create an error signal I
    ER
    . The filtered error
    signal modifies the pulse width commanded by V
    COMP
    to
    correct any unbalance and force I
    ER
    toward zero.
    In some circumstances, it may be necessary to deliberately
    design some channel-current unbalance into the system. In
    a highly compact design, one or two channels may be able
    to cool more effectively than the other(s) due to nearby air
    flow or heat sinking components. The other channel(s) may
    have more difficulty cooling with comparatively less air flow
    and heat sinking. The hotter channels may also be located
    close to other heat-generating components tending to drive
    their temperature even higher. In these cases, a proper
    selection of the current sense resistors (R
    ISEN
    in Figure 4)
    introduces channel current unbalance into the system.
    Increasing the value of R
    ISEN
    in the cooler channels and
    decreasing it in the hotter channels moves all channels into
    thermal balance at the expense of current balance.
    OVERCURRENT PROTECTION
    The average current, I
    AVG
    in Figure 5, is continually
    compared with a constant 75
    μ
    A reference current. If the
    average current at any time exceeds the reference current,
    the comparator triggers the converter to shut down. All PWM
    signals are placed in a high-impedance state which signals
    the drivers to turn off both upper and lower MOSFETs. The
    system remains in this state while the controller counts 2048
    phase-clock cycles.
    NOTE: *Channels 3 and 4 are optional.
    This is followed by a soft-start attempt (see
    Soft-Start
    ). If the
    soft-start attempt is successful, operation will continue as
    normal. Should the soft-start attempt fail, the ISL6557
    repeats the 2048-cycle wait period and follows with another
    soft-start attempt. This hiccup mode of operation continues
    FIGURE 4. INTERNAL AND EXTERNAL CURRENT-SENSING
    CIRCUITRY
    I
    n
    ISEN
    IL
    (
    )
    -------------------------
    =
    -
    +
    ISEN(n)
    R
    ISEN
    SAMPLE
    &
    HOLD
    ISL6557 INTERNAL CIRCUIT
    EXTERNAL CIRCUIT
    V
    IN
    CHANNEL N
    UPPER MOSFET
    CHANNEL N
    LOWER MOSFET
    -
    +
    ILrDS ON
    (
    )
    I
    L
    FIGURE 5. CHANNEL-1 PWM FUNCTION AND CURRENT-
    BALANCE ADJUSTMENT
    ÷
    N
    I
    AVG
    I
    4
    *
    I
    3
    *
    I
    2
    Σ
    -
    +
    +
    -
    +
    -
    f(j
    ω
    )
    PWM1
    I
    1
    V
    COMP
    SAWTOOTH SIGNAL
    I
    ER
    ISL6557
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    ISL6557CB-T 制造商:Intersil Corporation 功能描述:
    ISL6557CB-T WAF 制造商:Intersil Corporation 功能描述:
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    ISL6558CB-T 功能描述:IC REG CTRLR BUCK PWM 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR)
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