參數(shù)資料
型號： ISL6564
廠商： Intersil Corporation
英文描述： PWM Controller with Wide Input Range 8-CDIP -55 to 125
中文描述： 多相PWM控制器，帶有線性6位DAC能精密的RDS（ON）或DCR差分電流檢測
文件頁數(shù)： 16/27頁
文件大小： 798K
代理商： ISL6564
16
FN9156.2
December 27, 2004
In other cases, the designer may determine that a more
cost-effective solution can be achieved by adding droop.
Droop can help to reduce the output-voltage spike that
results from fast load-current demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 8, a current proportional to the average
current in all active channels, I
AVG
, flows from FB through a
load-line regulation resistor, R
FB
. The resulting voltage drop
across R
FB
is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as
The regulated output voltage is reduced by the droop voltage
V
DROOP
. The output voltage as a function of load current is
derived by combining Equation 8 with the appropriate
sample current expression defined by the current sense
method employed.
Where V
REF
is the reference voltage, V
OFS
is the
programmed offset voltage, I
OUT
is the total output current
of the converter, R
ISEN
is the sense resistor in the ISEN line,
and R
FB
is the feedback resistor. R
X
has a value of DCR,
r
DS(ON)
, or R
SENSE
depending on the sensing method.
Output-Voltage Offset Programming
The ISL6564 allows the designer to accurately adjust the
offset voltage. When a resistor, R
OFS
, is connected between
OFS to VCC, the voltage across it is regulated to 2.0V. This
causes a proportional current (I
OFS
) to flow into OFS. If
R
OFS
is connected to ground, the voltage across it is
regulated to 0.5V, and I
OFS
flows out of OFS. A resistor
between DAC and REF, R
REF
, is selected so that the
product (I
OFS
x R
OFS
) is equal to the desired offset voltage.
These functions are shown in Figure 9.
As it may be noticed in Figure 9, the OFSOUT pin must be
connected to the REF pin for this current injection to function
in ISL6564CR. The current flow through R
REF
creates an
offset at the REF pin, which is ultimately duplicated at the
output of the regulator.
Once the desired output offset voltage has been determined,
use the following formulas to set R
OFS
:
For Positive Offset (connect R
OFS
to VCC):
For Negative Offset (connect R
OFS
to GND):
×
V
OFFSET
0
1
1
0
1
1
0.8625V
0
1
1
0
1
0
0.8500V
0
1
1
0
0
1
0.8375V
0
1
1
0
0
0
0.8250V
0
1
0
1
1
1
0.8125V
0
1
0
1
1
0
0.8000V
0
1
0
1
0
1
0.7875V
0
1
0
1
0
0
0.7750V
0
1
0
0
1
1
0.7625V
0
1
0
0
1
0
0.7500V
0
1
0
0
0
1
0.7375V
0
1
0
0
0
0
0.7250V
0
0
1
1
1
1
0.7125V
0
0
1
1
1
0
0.7000V
0
0
1
1
0
1
0.6875V
0
0
1
1
0
0
0.6750V
0
0
1
0
1
1
0.6625V
0
0
1
0
1
0
0.6500V
0
0
1
0
0
1
0.6375V
0
0
1
0
0
0
0.6250V
0
0
0
1
1
1
0.6125V
0
0
0
1
1
0
0.6000V
0
0
0
1
0
1
0.5875V
0
0
0
1
0
0
0.5750V
0
0
0
0
1
1
0.5625V
0
0
0
0
1
0
0.5500V
0
0
0
0
0
1
0.5375V
0
0
0
0
0
0
0.525V
TABLE 1. VOLTAGE IDENTIFICATION (VID) CODES (Continued)
VID5
VID4
VID3
VID2
VID1
VID0
VDAC
V
DROOP
I
AVG
R
FB
=
(EQ. 8)
V
OUT
V
REF
V
OFFSET
–
I
4
-------------
R
R
ISEN
----------------- R
FB
–
=
(EQ. 9)
R
OFS
2
OFFSET
R
×
--------------------------
=
(EQ. 10)
R
OFS
-----------------------------
=
(EQ. 11)
ISL6564
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