參數(shù)資料
型號: ISL8484
廠商: Intersil Corporation
英文描述: Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch(超低導(dǎo)通電阻,+1.65V至+4.5V, 單電源, 雙路單刀雙擲模擬開關(guān))
中文描述: 超低電阻,從1.65V至4.5V,單電源,雙路SPDT模擬開關(guān)(超低導(dǎo)通電阻,從1.65V至4.5V時,單電源,雙路單刀雙擲模擬開關(guān))
文件頁數(shù): 9/15頁
文件大?。?/td> 330K
代理商: ISL8484
9
FN6128.3
June 14, 2007
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 9). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
Power-Supply Considerations
The ISL8484 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL8484 5.5V
maximum supply voltage provides plenty of room for the
10% tolerance of 4.3V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.65V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
to the “
Electrical Specifications”
tables, beginning on page 3,
and “
Typical Performance
Curves
”, beginning on page 10,
for details.
V+ and GND also power the internal logic and level shiftiers.
The level shiftiers convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2.7V to 4.5V (See Figure 17). At 2.7V
the V
IL
level is about 0.53V. This is still above the 1.8V
CMOS guaranteed low output maximum level of 0.5V, but
noise margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation. The ISL8484 has been
designed to minimize the supply current whenever the digital
input voltage is not driven to the supply rails (0V to V+). For
example driving the device with 2.85V logic (0V to 2.85V)
while operating with a 4.2V supply the device draws only
8
μ
A of current (see Figure 15 for V
IN
= 2.85V).
High-Frequency Performance
In 50
Ω
systems, the signal response is reasonably flat even
past 30MHz with a -3dB bandwidth of 120MHz (See
Figure 20). The frequency response is very consistent over a
wide V+ range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off isolation is
the resistance to this feedthrough, while crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 21 details the high off Isolation and crosstalk rejection
provided by this part. At 100kHz, off Isolation is about 68dB
in 50
Ω
systems, decreasing approximately 20dB per decade
as frequency increases. Higher load impedances decrease
off isolation and crosstalk rejection due to the voltage divider
action of the switch OFF impedance and the load
impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the
analog-signal-path leakage current. All analog leakage
current flows between each pin and one of the supply
terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the
same or opposite polarity. There is no connection between
the analog signal paths and V+ or GND.
FIGURE 9. OVERVOLTAGE PROTECTION
GND
V
COM
V
NO OR NC
OPTIONAL PROTECTION
DIODE
V+
IN
X
OPTIONAL PROTECTION
DIODE
OPTIONAL
PROTECTION
RESISTOR
ISL8484
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參數(shù)描述
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