- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383172 > ISL8724IRZ-T (INTERSIL CORP) Power Sequencing Controllers PDF資料下載
參數(shù)資料
| 型號(hào)： | ISL8724IRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Power Sequencing Controllers |
| 中文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, PLASTIC, QFN-24 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 276K |
| 代理商： | ISL8724IRZ-T |
9
FN6413.0
December 21, 2006
Using the ISL8723EVAL1 Platform
The
ISL8723EVAL1
platform allows evaluation of the
ISL8723, easily providing access to the critical nodes, see
Figure 21 for schematic and Figure 22 for a photograph of
the evaluation platform.
The board has a SMD layout with a
ISL8723
illustrating the
possible small implementation size for a typical four rail
sequencing application. There are bias and function labeled
test points to give access to the IC pins for evaluation.
Remember that significant current or capacitive loading of
particular I/O pins will affect functionality and performance.
The default configuration of the
ISL8723EVAL1
circuit was
built around the following design assumptions:
1. Using the
ISL8723IR
2. The four supplies being sequenced are 5V (IN_A), 3.3V
(IN_B), 2.5V (IN_D) and 1.5V (IN_C), the UVLO levels
are ~80% of nominal voltages. Resistors chosen such
that the total resistance of each divider is ~ 10k using
standard value resistors to approximate 80% of
nominal voltage supply = 0.63V on UVLO input.
3. The desired order turn-on sequence is 5V first, then 3.3V
about 12ms later then the 2.5V supply about 19ms later
and lastly the 1.5V supply about 40ms later.
4. The desired turn-off sequence is first the 2.5V, the 3.3V
12ms later, then the 1.5V supply about 36ms later and
lastly the 5V supply about 72ms after that.
5. LED off indicates sequence has completed and RESET
has released and pulled high.
All scope shots are taken from ISL8723EVAL1 board.
Figures 12 and 13 illustrate the desired turn-on and turn-off
sequences respectively. The sequencing order and delay
between voltages sequencing is set by external capacitance
values so other than that illustrated can be accomplished.
Figures 14 and 15 illustrate the timing relationships between
the EN input, RESET#, DLY and GATE outputs and the
VOUT voltage for a single channel being turned on and off
respectively.
RESET# and SYSRST# functionality and relationships are
shown in Figures 16 through 20.
Figure 16 illustrates that with a rising VDD, EN tied to VDD,
and all UVLO configured to be satisfied, both the RESET#
and SYSRST# are held low before VDD = 1V. SYSRST# is
released to go high once the last UVLO is satisfied and
RESET# is released to go high at
T
RSTdel
after the last GATE
is high.
Figure 17 shows GATE and RESET# response to SYSRST#
being pulled low.
Figure 18 shows EN high to SYSRST# delay with all UVLO
inputs satisfied.
Figure 19 shows RESET# and SYSRST# delay to EN pulled
low.
Figure 20 shows ~8μs of glitch filter duration, tFIL during
which the RESET# and SYSRST# do not react.
FIGURE 10. GATE TURN-OFF/ON (DIS)CHARGE CURRENT
FIGURE 11. FAULT GATE TURN-OFF SINK CURRENT
Typical Performance Curves
(Continued)
9.4
9.5
9.6
9.7
9.8
9.9
10.0
10.1
10.2
10.3
-40
-20
0
25
45
75
85
100
125
TEMPERATURE (°C)
G
I_GATE_OFF
I_GATE_ON
40
50
60
70
80
90
100
-40
-20
0
25
45
75
85
100
125
TEMPERATURE (°C)
F
ISL8723, ISL8724
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL88015IH5Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88011 | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88011IH522Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88011IH523Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88011IH526Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL88001/2/3EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL88001/2/3 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:* 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| ISL88001IE16Z-T | 功能描述:IC VOLT SUPERVISOR 1.58V SC-70 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 130 ms 電壓 - 閥值:4.25V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| ISL88001IE16Z-T7A | 功能描述:IC VOLT SUPERVISOR 1.58V SC70-3 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 130 ms 電壓 - 閥值:4.25V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| ISL88001IE16Z-TK | 功能描述:IC VOLT SUPERVISOR 1.58V SC-70 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 其它有關(guān)文件:STM6717 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 類型:多壓監(jiān)控器 監(jiān)視電壓數(shù)目:2 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 600 ms 電壓 - 閥值:1.11V，3.075V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1194 (CN2011-ZH PDF) 其它名稱:497-7019-6 |
| ISL88001IE17Z-T | 功能描述:IC VOLT SUPERVISOR 1.67V SC-70 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 130 ms 電壓 - 閥值:4.25V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。