5
FN8234.2
November 10, 2006
SDA vs SCL Timing
NOTES:
2. Typical values are for TA = +25°C and 3.3V supply voltage.
3. LSB: [V(RW)255 – V(RW)0]/255. V(RW)255 and V(RW)0 are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
4. ZS error = V(RW)0/LSB.
5. FS error = [V(RW)255 – VCC]/LSB.
6. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 255. i is the DCP register setting.
7. INL = (V(RW)i – i LSB – V(RW)0)/LSB, for i = 1 to 255.
8.
for i = 16 to 240 decimal, T = -40°C to +105°C. Max( ) is the maximum value of the wiper
voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
9. MI =
|R255 – R0|/255. R255 and R0 are the measured resistances for the DCP register set to FF hex and 00 hex respectively.
Roffset = R0/MI, when measuring between RW and RL.
10. Roffset = R255/MI, when measuring between RW and RH.
11. RDNL = (Ri – Ri-1)/MI, for i = 32 to 255.
12. RINL = [Ri – (MI i) – R0]/MI, for i = 32 to 255.
13.
for i = 32 to 255, T = -40°C to +105°C. Max( ) is the maximum value of the resistance and Min ( ) is the
minimum value of the resistance over the temperature range.
14. This parameter is not 100% tested.
tHD:STO
STOP Condition Hold Time for Read,
or Volatile Only Write
From SDA rising edge to SCL falling edge. Both
crossing 70% of VCC.
600
ns
tDH (Note 14) Output Data Hold Time From SCL falling edge crossing 30% of VCC, until
SDA enters the 30% to 70% of VCC window.
0ns
SDA and SCL Rise Time
From 30% to 70% of VCC
20 +
0.1 * Cb
250
ns
SDA and SCL Fall Time
From 70% to 30% of VCC
20 +
0.1 * Cb
250
ns
Capacitive Loading of SDA or SCL
Total on-chip and off-chip
10
400
pF
SDA and SCL Bus Pull-Up Resistor
Off-Chip
Maximum is determined by tR and tF.
For Cb = 400pF, max is about 2~2.5k
Ω.
For Cb = 40pF, max is about 15~20k
Ω
1k
Ω
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 1)
MAX
UNITS
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
TC
V
Max V RW
()
i
() Min V RW
()
i
()
–
Max V RW
()
i
() Min V RW
()
i
()
+
[] 2
----------------------------------------------------------------------------------------------
106
145°C
-----------------
×
=
TC
R
Max Ri
() Min Ri
()
–
[]
Max Ri
() Min Ri
()
+
[] 2
----------------------------------------------------------------
10
6
145°C
-----------------
×
=
ISL90810