參數(shù)資料
型號： ISL97522IRZ-TK
廠商： INTERSIL CORP
元件分類： 顯示驅(qū)動器
英文描述： 4-Channel TFT-LCD Supply
中文描述： LIQUID CRYSTAL DISPLAY DRIVER, QCC38
封裝： ROHS COMPLIANT, PLASTIC, MO-220, QFN-38
文件頁數(shù)： 13/20頁
文件大?。?/td> 418K
代理商： ISL97522IRZ-TK
13
FN7445.0
December 13, 2006
PI mode C
INT
(C
23
) and R
INT
(R
10
)
The IC is designed to operate with a minimum C
23
capacitor
of 4.7nF and a minimum C
2
(effective) = 10μF.
Note that, for high voltage A
VDD
, the voltage coefficient of
ceramic capacitors (C
2
) reduces their effective capacitance
greatly; a 16V 10μF ceramic can drop to around 3μF at 15V.
To improve the transient load response of A
VDD
in PI mode,
a resistor may be added in series with the C
23
capacitor. The
larger the resistor the lower the overshoot but at the expense
of stability of the converter loop - especially at high currents.
With L = 10μH, A
VDD
= 15V, C
23
= 4.7nF, C
2
(effective)
should have a capacitance of greater than 10μF. R
INT
(R
7
)
can have values up to 5k
Ω
for C
2
(effective) up to 20μF and
up to 10K for C
2
(effective) up to 30μF.
Larger values of R
INT
(R
7
) may be possible if maximum
A
VDD
load currents less than the current limit are used. To
ensure A
VDD
stability, the IC should be operated at the
maximum desired current and then the transient load
response of A
VDD
should be used to determine the
maximum value of R
INT
Operation of the DELB Output Function
An open drain DELB output is provided to allow the boost
output voltage, developed at C
2
(see application diagram),
to be delayed via an external switch (Q3) to a time after the
V
BOOST
supply and negative V
OFF
charge pump supply
have achieved regulation during the start-up sequence
shown in Figure 21. This then allows the A
VDD
and V
ON
supplies to start-up from 0V instead of the normal offset
voltage of V
IN
-V
DIODE
(D
1
) if Q3 were not present.
When DELB is activated by the start-up sequencer, it sinks
50μA allowing a controlled turn-on of Q3 and charge-up of
C
9
. C
16
can be used to control the turn-on time of Q3 to
reduce inrush current into C
9
. The potential divider formed
by R
9
and R
8
can be used to limit the V
GS
voltage of Q3 if
required by the voltage rating of this device. When the
voltage at DELB falls to less than 0.6V, the sink current is
increased to ~1.2mA to firmly pull DELB to 0V.
The voltage at DELB is monitored by the fault protection
circuit so that if the initial 50μA sink current fails to pull DELB
below ~0.6V after the start-up sequencing has completed,
then a fault condition will be detected and a fault time-out
ramp will be initiated on the C
DEL
capacitor (C
7
).
Linear-Regulator Controllers (V
ON
, V
OFF
)
The ISL97522 includes two independent linear-regulator
controllers, in which one is a positive output voltage (V
ON
),
and one is negative. The V
ON
and V
OFF
linear-regulator
controller function diagrams are shown in Figures 17,
and 18, respectively.
Calculation of the Linear Regulator Base-Emitter
Resistors ( R
BP
and R
BN
)
For the pass transistor of the linear regulator, low frequency
gain (Hfe) and unity gain freq. (f
T
) are usually specified in the
datasheet. The pass transistor adds a pole to the loop transfer
function at f
p
= f
T
/Hfe. Therefore, in order to maintain phase
margin at low frequency, the best choice for a pass device is
often a high frequency low gain switching transistor. Further
improvement can be obtained by adding a base-emitter resistor
R
BE
(R
BP
, R
BL
, R
BN
in the Functional Block Diagram), which
increase the pole frequency to: f
p
= f
T
*(1+ Hfe *re/R
BE
)/Hfe,
where re = KT/qIc. So choose the lowest value R
BE
in the
design as long as there is still enough base current (I
B
) to
support the maximum output current (I
C
).
We will take as an example the V
ON
linear regulator. If a
Fairchild MMBT3906 PNP transistor is used as the external pass
transistor, Q11 in the application diagram, then for a maximum V
ON
operating requirement of 50mA the data sheet indicates HFE_min =
30.
The base-emitter saturation voltage is: Vbe_max = 0.7V.
For the ISL97522, the minimum drive current is:
I_DRVP_min = 2mA.
The minimum base-emitter resistor, R
BP
, can now be
calculated as:
R
BP
_min = V
BE
_max/(I_DRVP_min - Ic/Hfe_min) =
0.7V/(2mA - 50mA/30) = 2.1k
Ω
This is the minimum value that can be used - so, we now
choose a convenient value greater than this minimum value;
say 3K
Ω
. Larger values may be used to reduce quiescent
current, however, regulation may be adversely affected, by
supply noise if R
BP
is made too high in value.
-
+
-
+
36V
ESD
CLAMP
GMP
LDO_ON
PG_LDOP
1 : Np
FBP
DRVP
3k
Ω
R
BP
A
VDD
0.1μF
0.1μF
CP (TO 36V)
R
P2
R
P1
C
ON
V
ON
(TO 35V)
ISINB
0.9V
FIGURE 17. V
ON
FUNCTION BLOCK DIAGRAM
ISL97522
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