參數(shù)資料
型號： ISP1161ABM
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù)： 16/134頁
文件大小： 587K
代理商： ISP1161ABM
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
16 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.4 FIFO buffer RAM access by PIO mode
Since the ISP1161A internal memory is structured as a FIFO buffer RAM, the FIFO
buffer RAM is mapped to dedicated register fields. Therefore, accessing the internal
FIFO buffer RAM is similar to accessing the internal control registers in multiple data
phases.
Figure 16
shows a complete access cycle of the HC internal FIFO buffer RAM. For a
write cycle, the microprocessor first writes the FIFO buffer RAM’s command code to
the command port, and then writes the data words one by one to the data port until
half of the transfer’s byte count is reached. The HcTransferCounter register (22H -
read, A2H - write) is used to specify the byte count of a FIFO buffer RAM’s read cycle
or write cycle. Every access cycle must be in the same access direction. The read
cycle procedure is similar to the write cycle.
For access to the DC FIFO buffer RAM access, see
Section 13
.
Fig 15. Accessing DC control registers.
A1, A0
WR
CS
11
10
10
MGT940
D[15:0]
RD
DC command
code
DC register data
(upper word)
DC register data
(lower word)
read
read
write
write
write
read
read
write
write
Fig 16. Internal FIFO buffer RAM access cycle.
MGT941
read/write data
#1 (16 bits)
FIFO buffer RAM access cycle (transfer counter = 2N)
t
read/write data
#2 (16 bits)
read/write data
#N (16 bits)
write command
(16 bits)
相關(guān)PDF資料
PDF描述
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161ABM,518 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM,551 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM,557 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM-S 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161ABM-T 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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