參數(shù)資料
型號: ISP1183
廠商: NXP Semiconductors N.V.
英文描述: Low-power Universal Serial Bus interface device with DMA
中文描述: 低功耗通用串行總線與DMA接口設備
文件頁數(shù): 18/62頁
文件大?。?/td> 295K
代理商: ISP1183
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
18 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11.2 8237 compatible mode
The 8237 compatible DMA mode is selected by clearing bit DAKOLY in the Hardware
Configuration register (see
Table 20
). The pin functions for this mode are shown in
Table 8
.
The DMA subsystem of an IBM-compatible PC is based on the Intel 8237 DMA
controller. It operates as a ‘fly-by’ DMA controller: the data is not stored in the DMA
controller, but it is transferred between an I/O port and a memory address. A typical
example of the ISP1183 in the 8237-compatible DMA mode is given in
Figure 9
.
The 8237 has two control signals for each DMA channel: DREQ (DMA request) and
DACK_N (DMA acknowledge). General control signals are HRQ (hold request) and
HLDA (hold acknowledge). The bus operation is controlled using MEMR_N (memory
read), MEMW_N (memory write), IOR_N (I/O read) and IOW_N (I/O write).
Table 8:
Symbol
DREQ
DACK
RD_N
WR_N
8237 compatible mode: pin functions
Description
DMA request
DMA acknowledge
read strobe
write strobe
I/O
O
I
I
I
Function
ISP1183 requests a DMA transfer
DMA controller confirms the transfer
instructs the ISP1183 to put data on the bus
instructs the ISP1183 to get data from the bus
Fig 9.
ISP1183 in the 8237-compatible DMA mode.
DATA[7:0]
CPU
004aaa291
RAM
ISP1183
DMA
CONTROLLER
8237
DREQ
DREQ
DACK
HRQ
HLDA
HRQ
HLDA
DACK_N
IOR_N
IOW_N
MEMR_N
MEMW_N
RD_N
WR_N
相關PDF資料
PDF描述
ISP1183BS Low-power Universal Serial Bus interface device with DMA
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