參數(shù)資料
型號: ISP1761ET,518
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA128
封裝: 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128
文件頁數(shù): 102/164頁
文件大小: 767K
代理商: ISP1761ET,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
41 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
8.2.8 ISO PTD Skip Map register
Table 26 shows the bit description of the register.
When a bit in the PTD Skip Map is set to logic 1 that PTD will be skipped although its V bit
may be set. The information in that PTD is not processed. For example, NextPTDPointer
will not affect the order of processing of PTDs. The Skip bit must not normally be set on
the position indicated by NextPTDPointer.
8.2.9 ISO PTD Last PTD register
Table 27 shows the bit description of the ISO PTD Last PTD register.
Once the LastPTD bit corresponding to a PTD is set, this will be the last PTD processed
(checking V = 1) in that PTD category. Subsequently, the process will restart with the rst
PTD of that group. This is useful to reduce the time in which all the PTDs, the respective
memory space, would be checked, especially if only a few PTDs are dened. The
LastPTD bit must normally be set to a higher position than any other position indicated by
the NextPTDPointer from an active PTD.
8.2.10 INT PTD Done Map register
The bit description of the register is given in Table 28.
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reect the updated status of new executed PTDs.
8.2.11 INT PTD Skip Map register
Table 29 shows the bit description of the INT PTD Skip Map register.
Table 26.
ISO PTD Skip Map register (address 0134h) bit description
Bit
Symbol
Access
Value
Description
31 to 0
ISO_PTD_SKIP
_
MAP[31:0]
R/W
FFFF FFFFh
ISO PTD Skip Map: Skip map for each of the 32 PTDs for the
ISO transfer
Table 27.
ISO PTD Last PTD register (address 0138h) bit description
Bit
Symbol
Access
Value
Description
31 to 0
ISO_PTD_LAST_
PTD[31:0]
R/W
0000 0000h
ISO PTD last PTD: Last PTD of the 32 PTDs.
1h — One PTD in ISO
2h — Two PTDs in ISO
4h — Three PTDs in ISO
Table 28.
INT PTD Done Map register (address 0140h) bit description
Bit
Symbol
Access
Value
Description
31 to 0
INT_PTD_DONE
_
MAP[31:0]
R
0000 0000h INT PTD Done Map: Done map for each of the 32 PTDs for the INT
transfer
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