參數(shù)資料
型號： ISP1761ET
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA128
封裝： 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128
文件頁數(shù)： 104/158頁
文件大?。?/td> 724K
代理商： ISP1761ET
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
104 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
10.4.3
Interrupt Configuration register (R/W: 0210h)
This 1 B register determines the behavior and polarity of the INT output. The bit allocation
is shown in
Table 98
. When the USB SIE receives or generates an ACK, NAK or STALL, it
will generate interrupts depending on three Debug mode fields.
CDBGMOD[1:0] —
Interrupts for the control endpoint 0
DDBGMODIN[1:0] —
Interrupts for the DATA IN endpoints 1 to 7
DDBGMODOUT[1:0] —
Interrupts for the DATA OUT endpoints 1 to 7.
The Debug mode settings for CDBGMOD, DDBGMODIN and DDBGMODOUT allow you
to individually configure when the ISP1761 sends an interrupt to the external
microprocessor.
Table 100
lists the available combinations.
Bit INTPOL controls the signal polarity of the INT output: active HIGH or LOW, rising or
falling edge. For level-triggering, bit INTLVL must be made logic 0. By setting INTLVL to
logic 1, an interrupt will generate a pulse of 60 ns (edge-triggering).
7
CLKAON
Clock Always On:
1 —
Enable the Clock-Always-On feature
0 —
Disable the Clock-Always-On feature.
When the Clock-Always-On feature is disabled, a GOSUSP event can
stop the clock. (The clock is stopped after a delay of approximately
2 ms). Therefore, the Peripheral Controller will consume less power.
If the Clock-Always-On feature is enabled, the clocks are always running
and the GOSUSP event is unable to stop the clock while the Peripheral
Controller enters the suspend state.
Send Resume:
Writing logic 1, followed by logic 0 will generate an
upstream resume signal of 10 ms duration, after a 5 ms delay.
Go Suspend:
Writing logic 1, followed by logic 0 will activate suspend
mode.
Soft Reset:
Writing logic 1, followed by logic 0 will enable a
software-initiated reset to the ISP1761. A soft reset is similar to a
hardware-initiated reset (using the RESET_N pin).
Global Interrupt Enable:
Logic 1 enables all interrupts. Individual
interrupts can be masked by clearing the corresponding bits in the
DcInterruptEnable register.
When this bit is not set, an unmasked interrupt will not generate an
interrupt trigger on the interrupt pin. If the global interrupt, however, is
enabled while there is any pending unmasked interrupt, an interrupt
signal will be immediately generated on the interrupt pin. (If the interrupt
is set to the pulse mode, the interrupt events that were generated before
the global interrupt is enabled may be dropped.)
Wake up on Chip Select:
Logic 1 enables wake up through a valid
register read on the ISP1761. (A read will invoke the chip clock to
restart. A write to the register before the clock is stable may cause
malfunctioning.)
reserved
6
SNDRSU
5
GOSUSP
4
SFRESET
3
GLINTENA
2
WKUPCS
1 to 0
-
Table 97:
Bit
Mode register: bit description
…continued
Symbol
Description
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參數(shù)描述
ISP1761ET,518 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,557 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ETGE 功能描述:IC USB CTRL HI-SPEED 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761ET-S 功能描述:IC USB OTG CONTROLLER 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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