Specifications ispLSI 1048 9 Maximum GRP Delay vs GLB Loads ispLSI 1048-70 ispLSI 1048-50 0126A-48-80-isp ispLSI 1048-80 1 2 3 4 8 12 16 GLB Lo" />
參數(shù)資料
型號: ISPLSI 1048-50LQ
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC PLD ISP 96I/O 24NS 120PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispLSI® 1000
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 24.0ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目: 48
門數(shù): 8000
輸入/輸出數(shù): 96
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 120-BQFP
供應(yīng)商設(shè)備封裝: 120-PQFP(28x28)
包裝: 托盤
其它名稱: ISPLSI1048-50LQ
Specifications ispLSI 1048
9
Maximum GRP Delay vs GLB Loads
ispLSI 1048-70
ispLSI 1048-50
0126A-48-80-isp
ispLSI 1048-80
1
2
3
4
8
12
16
GLB Loads
GRP
Delay
(ns)
4
5
6
0
7
8
Power Consumption
Power consumption in the ispLSI 1048 device depends
on two primary factors: the speed at which the device is
operating, and the number of Product Terms used. Fig-
ure 3 shows the relationship between power and operat-
ing speed.
50
100
150
200
250
0
1020
3040
50
60
70
fmax (MHz)
I CC
(mA)
Notes: Configuration of Twelve 16-bit Counters
Typical Current at 5V, 25C
ispLSI 1048
80
0127A-48-80-isp
ICC can be estimated for the ispLSI 1048 using the following equation:
ICC = 73 + (# of PTs * 0.23) + (# of nets * Max. freq * 0.010) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of 2 GLB loads on
average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions and the
program in the device, the actual ICC should be verified.
Figure 3. Typical Device Power Consumption vs fmax
ALL
DEVICES
DISCONTINUED
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ispLSI1048-50LQ 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ispLSI1048-50LQI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ispLSI1048-70LQ 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ISPLSI1048-70LT 制造商:Lattice Semiconductor Corporation 功能描述:
ISPLSI1048-80LQ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD