參數(shù)資料
型號： K4S161622E-TC80
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 1M x 16 SDRAM
中文描述： 100萬× 16內存
文件頁數(shù)： 4/42頁
文件大?。?/td> 675K
代理商： K4S161622E-TC80
K4S161622E
CMOS SDRAM
Rev 1.1 Jan '03
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to Vss
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
, V
DDQ
3.0
3.3
3.6
V
Input logic high votlage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input logic low voltage
V
IL
-0.3
0
0.8
V
2
Output logic high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output logic low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current
I
LI
-10
-
10
uA
3
Note :
:
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
=1.4V
±
200
mV)
Pin
Symbol
Min
Max
Unit
Clock
C
CLK
2
4
pF
RAS, CAS, WE, CS, CKE, L(U)DQM
C
IN
2
4
pF
Address
C
ADD
2
4
pF
DQ
0
~ DQ
15
C
OUT
3
5
pF
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs.
DECOUPLING CAPACITANCE GUIDE LINE
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
Decoupling Capacitance between V
DD
and V
SS
C
DC1
0.1 + 0.01
uF
Decoupling Capacitance between V
DDQ
and V
SSQ
C
DC2
0.1 + 0.01
uF
1. V
DD
and V
DDQ
pins are separated each other.
All V
DD
pins are connected in chip. All V
DDQ
pins are connected in chip.
2. V
SS
and V
SSQ
pins are separated each other
All V
SS
pins are connected in chip. All V
SSQ
pins are connected in chip.
Note :
相關PDF資料
PDF描述
K4S161622H 16Mb H-die SDRAM Specification
K4S161622H-TC55 16Mb H-die SDRAM Specification
K4S161622H-TC60 16Mb H-die SDRAM Specification
K4S161622H-TC70 16Mb H-die SDRAM Specification
K4S161622H-TC80 16Mb H-die SDRAM Specification
相關代理商/技術參數(shù)
參數(shù)描述
K4S161622H 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mb H-die SDRAM Specification
K4S161622H-TC55 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mb H-die SDRAM Specification
K4S161622HTC60 制造商:SAMSUNG 功能描述:New
K4S161622H-TC60 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mb H-die SDRAM Specification
K4S161622H-TC70 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mb H-die SDRAM Specification
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