參數(shù)資料
型號: K4S643232H-TC55
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 64Mb H-die (x32) SDRAM Specification
中文描述: 64兆?芯片(X32號)內(nèi)存規(guī)格
文件頁數(shù): 3/12頁
文件大?。?/td> 118K
代理商: K4S643232H-TC55
CMOS SDRAM
- 3 -
SDRAM 64Mb H-die (x32)
Rev. 1.4 August 2004
The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated
with SAMSUNG
s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock.
I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable
latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
512K x 32Bit x 4 Banks SDRAM
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period(4K Cycle)
FEATURES
GENERAL DESCRIPTION
Part No.
Orgainization
Max Freq.
143MHz(CL=3)
166MHz(CL=3)
183MHz(CL=3)
200MHz(CL=3)
Interface
Package
K4S643232H-TC/L70
K4S643232H-TC/L60
K4S643232H-TC/L55
K4S643232H-TC/L50
2Mb x 32
LVTTL
86pin TSOP(II)
Ordering Information
Row & Column address configuration
Organization
2Mx32
Row Address
A0~A10
Column Address
A0-A7
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