參數(shù)資料
型號： K9F5616D0C
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
中文描述： 32M的× 8位，16米x 16位NAND閃存
文件頁數(shù)： 29/42頁
文件大?。?/td> 684K
代理商： K9F5616D0C
FLASH MEMORY
29
K9F5608D0C
K9F5608U0C
K9F5608Q0C
K9F5616D0C
K9F5616U0C
K9F5616Q0C
DEVICE OPERATION
PAGE READ
Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00h to the command regis-
ter along with three address cycles. Once the command is latched, it does not need to be written for the following page read opera-
tion. Two types of operations are available : random read, serial page read.
The random read mode is enabled when the page address is changed. The 528 bytes(X8 device) or 264 words(X16 device) of data
within the selected page are transferred to the data registers in less than 10
μ
s(t
R
). The system controller can detect the completion of
this data transfer(tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the registers, they may be read out in
50ns(K9F5616Q0C : 60ns) cycle time by sequentially pulsing RE. High to low transitions of the RE clock output the data starting from
the selected column address up to the last column address.
The way the Read1 and Read2 commands work is like a pointer set to either the main area or the spare area. Addresses A
0~
A
3
(X8
device) or A
0~
A
2
(X16 device) set the starting address of the spare area while addresses A
4
~A
7
are ignored in X8 device case
or
A
3~
A
7
must be "L" in X16 device case. The Read1 command is needed to move the pointer back to the main area. Figures 8,9 show
typical sequence and timings for each read operation.
Sequential Row Read is available only on
K9F5608U0C_Y,P,V,F or K9F5608D0C_Y,P
:
After the data of last column address is clocked out, the next page is automatically selected for sequential row read. Waiting 10
μ
s
again allows reading the selected page. The sequential row read operation is terminated by bringing CE high. Unless the operation
is aborted, the page address is automatically incremented for sequential row read as in Read1 operation and spare sixteen bytes of
each page may be sequentially read. The Sequential Read 1 and 2 operation is allowed only within a block and after the last page of
a block is readout, the sequential read operation must be terminated by bringing CE high. When the page address moves onto the
next block, read command and address must be given. Figures 8-1, 9-1 show typical sequence and timings for sequential row read
operation.
Figure8. Read1 Operation
Start Add.(3Cycle)
00h
X8 device : A
0
~ A
7
& A
9
~ A
24
X16 device : A
0
~ A
7
& A
9
~ A
24
Data Output(Sequential)
(00h Command)
Data Field
Spare Field
CE
CLE
ALE
R/B
WE
RE
t
R
Main array
(01h Command)
Data Field
Spare Field
1st half array
2st half array
NOTE: 1) After data access on 2nd half array by 01h command, the start pointer is automatically moved to 1st half
array (00h) at next cycle. 01h command is only available on X8 device(K9F5608X0C).
I/Ox
On K9F5608U0C_Y,P,V,F or K9F5608D0C_Y,P
CE must be held
low during tR
1)
相關(guān)PDF資料
PDF描述
K9F5616D0C-D 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
K9F5616D0C-H 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
K9F5616D0C-P 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
K9F5616D0C-Y 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
K9F5608D0C-D TV 37C 37#16 SKT RECP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K9F5616D0C-D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit 16M x 16 Bit NAND Flash Memory
K9F5616D0C-H 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit 16M x 16 Bit NAND Flash Memory
K9F5616D0C-P 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit 16M x 16 Bit NAND Flash Memory
K9F5616D0C-Y 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit 16M x 16 Bit NAND Flash Memory
K9F5616Q0B-DCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
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