![](http://datasheet.mmic.net.cn/300000/KFG1216Q2A_datasheet_16197796/KFG1216Q2A_108.png)
OneNAND512(KFG1216x2A-xxB5)
FLASH MEMORY
108
Synchronous Mode Using the INT Pin
When operating synchronously, INT is tied directly to a Host GPIO.
An alternate method of determining the end of an operation is to continuously monitor the Interrupt Status Register Bit instead of
using the INT pin.
Host
OneNAND
Asynchronous Mode Using the INT Pin
When configured to operate in an asynchronous mode, /CE and /AVD of the OneNAND are tied to /CE of the Host. CLK is tied to the
Host Vss (Ground). /RDY is tied to a no-connect. /OE of the OneNAND and Host are tied together and INT is tied to a GPIO.
RDY
OE
CLK
CE
RDY
OE
CLK
CE
AVD
AVD
GPIO
INT
Host
OneNAND
N.C
OE
Vss
CE
RDY
OE
CLK
CE
AVD
GPIO
INT
INT
Command
This can be configured in either a synchronous mode or an asynchronous mode.
7.1.2 Polling the Interrupt Register Status Bit