參數(shù)資料
型號: KFG1G16D2M-DED5
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: FLASH MEMORY(54MHz)
中文描述: 閃存(54MHz之間)
文件頁數(shù): 12/93頁
文件大小: 1219K
代理商: KFG1G16D2M-DED5
OneNAND512/OneNAND1GDDP
FLASH MEMORY
12
BootRAM 0
BootRAM 1
DataRAM 0_0
DataRAM 0_1
DataRAM 0_2
DataRAM 0_3
BootRAM
Sector
DataRAM 0
DataRAM 1_0
DataRAM 1_1
DataRAM 1_2
DataRAM 1_3
DataRAM 1
{
Main area data
(512B)
Spare area data
(16B)
{
Main area data
(512B)
Spare area data
(16B)
(BufferRAM)
(NAND array)
Main area
256W
Main area
256W
Main area
256W
Main area
256W
Spare
area
8W
Spare
area
8W
Spare
area
8W
Spare
area
8W
Figure 2. BufferRAM and NAND array structure
Figure 3. Spare area of NAND array assignment
Page:2KB+64B
Sector(main area):512B
Sector(spare area):16B
Block:
64pages
128KB+4KB
NOTE
:
1)
The 1st word of spare area in 1st and 2nd page of every invalid block is reserved for the invalid block information by manufacturer.
Please refer to page 64 about the details.
2) These words are managed by internal ECC logic. So it is recommended that the important data like LSN(Logical Sector Number)
are written.
3) These words are reserved for the future purpose by manufacturer. These words will be dedicated to internal logic.
4) These words are for free usage.
5)
The 5th, 6th and 7th words are dedicated to internal ECC logic. So these words are only readable. The other words are program-
mable by command.
6)
ECCm 1st, ECCm 2nd, ECCm 3rd: ECC code for Main area data
7)
ECCs 1st, ECCs 2nd: ECC code for 2nd and 3rd word of spare area.
{
1
st
W
ECCm
1st
ECCm
2nd
ECCm
3rd
ECCs
1st
ECCs
2nd
LSB
MSB
2
nd
W
3
rd
W
4
th
W
5
th
W
6
th
W
7
th
W
8
th
W
FFh
(Note3)
Note1 Note1 Note2 Note2 Note2 Note3 Note3 Note3
Note4 Note4
相關(guān)PDF資料
PDF描述
KFG1G16D2M-DED6 FLASH MEMORY(54MHz)
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