- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373157 > KM48V2004C (SAMSUNG SEMICONDUCTOR CO. LTD.) 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) PDF資料下載
參數(shù)資料
| 型號(hào)： | KM48V2004C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) |
| 中文描述： | 200萬× 8位的擴(kuò)展數(shù)據(jù)輸出的CMOS動(dòng)態(tài)RAM（2米× 8位的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器（帶擴(kuò)展數(shù)據(jù)輸出）） |
| 文件頁數(shù)： | 6/21頁 |
| 文件大小： | 367K |
| 代理商： | KM48V2004C |
KM48C2004C, KM48C2104C
KM48V2004C, KM48V2104C
CMOS DRAM
AC CHARACTERISTICS
(Continued)
Parameter
Symbol
-5
-6
Units
Notes
Min
Max
Min
Max
Data set-up time
t
DS
0
0
ns
9
Data hold time
t
DH
t
REF
t
REF
t
REF
t
WCS
t
CWD
t
RWD
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPA
t
HPC
t
HPRWC
t
CP
t
RASP
t
RHCP
t
OEA
t
OED
t
OEZ
t
OEH
t
WTS
t
WTH
t
WRP
t
WRH
t
DOH
t
REZ
t
WEZ
t
WED
t
OCH
t
CHO
t
OEP
t
WPE
t
RASS
t
RPS
t
CHS
8
10
ns
9
Refresh period (2K, Normal)
32
32
ms
Refresh period (4K, Normal)
64
64
ms
Refresh period (L-ver)
128
128
ms
Write command set-up time
0
0
ns
7
CAS to W delay time
30
34
ns
7
RAS to W delay time
67
79
ns
7
Column address to W delay time
42
49
ns
7
CAS precharge to W delay time
47
54
ns
CAS set-up time (CAS -before-RAS refresh)
5
5
ns
CAS hold time (CAS -before-RAS refresh)
10
10
ns
RAS to CAS precharge time
5
5
ns
Access time from CAS precharge
28
35
ns
3
Hyper Page cycle time
20
25
ns
13
Hyper Page read-modify-write cycle time
47
56
ns
13
CAS precharge time (Hyper Page cycle)
8
10
ns
RAS pulse width (Hyper Page cycle)
50
200K
60
200K
ns
RAS hold time from CAS precharge
30
35
ns
OE access time
13
15
ns
OE to data delay
13
15
ns
Output buffer turn off delay time from OE
3
13
3
15
ns
6
OE command hold time
13
15
ns
Write command set-up time (Test mode in)
10
10
ns
11
Write command hold time (Test mode in)
10
10
ns
11
W to RAS precharge time(C-B-R refresh)
10
10
ns
W to RAS hold time(C-B-R refresh)
10
10
ns
Output data hold time
5
5
ns
Output buffer turn off delay from RAS
3
13
3
15
ns
6,14
Output buffer turn off delay from W
3
13
3
15
ns
6
W to data delay
15
15
ns
OE to CAS hold time
5
5
ns
CAS hold time to OE
5
5
ns
OE precharge time
5
5
ns
W pulse width (Hyper Page Cycle)
5
5
ns
RAS pulse width (C-B-R self refresh)
100
100
us
15,16,17
RAS precharge time (C-B-R self refresh)
90
110
ns
15,16,17
CAS hold time (C-B-R self refresh)
-50
-50
ns
15,16,17
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM48C2004C | 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) |
| KM48C2104C | 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) |
| KM48V2104C | 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) |
| KM48V8004B | 8M x 8bit CMOS Dynamic RAM with Extended Data Out |
| KM48V8104B | 8M x 8bit CMOS Dynamic RAM with Extended Data Out |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM48V2100B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 8Bit CMOS Dynamic RAM with Fast Page Mode |
| KM48V2104CS-L6 | 制造商:Samsung Semiconductor 功能描述: |
| KM48V8004B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8bit CMOS Dynamic RAM with Extended Data Out |
| KM48V8004C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8bit CMOS Dynamic RAM with Extended Data Out |
| KM48V8104B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8bit CMOS Dynamic RAM with Extended Data Out |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。