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參數(shù)資料
| 型號： | KM68512ALG-7L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2.7 V to 5.5 V, <100 µA, 8-Bit nanoDAC® D/A Converter with I2C Compatible Interface, Tiny SC70 Package; Package: SC70; No of Pins: 6; Temperature Range: Industrial |
| 中文描述： | 64Kx8位低功耗CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 143K |
| 代理商： | KM68512ALG-7L |
KM68512A Family
CMOS SRAM
Revision 4.0
January 1997
6
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS1=OE=V
IL
, WE=V
IH
)
t
AA
t
RC
t
OH
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
CS
1
Address
OE
Data ou
t
NOTES (
READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
t
OH
t
AA
t
CO1
t
OLZ
t
LZ
t
OHZ
t
HZ(1,2)
t
RC
t
CO2
t
OE
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相關代理商/技術參數(shù) |
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| KM68512ALI | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Kx8 bit Low Power CMOS Static RAM |
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| KM68512ALT7L | 制造商:SAM 功能描述:68512 SAMSUNG'9546 PLCC |
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