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參數(shù)資料
| 型號(hào)： | KMM5364005BSWG |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V |
| 中文描述： | 4米× 36的DRAM上海藥物研究所使用4Mx16 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 393K |
| 代理商： | KMM5364005BSWG |
DRAM MODULE
KMM5364005BSW/BSWG
CAPACITANCE
(T
A
= 25
°
C, V
CC
=5V, f = 1MHz)
Item
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
DQ
Min
Max
25
31
31
24
17
Unit
pF
pF
pF
pF
pF
Input capacitance[A0-A11]
Input capacitance[W]
Input capacitance[RAS0/RAS2]
Input capacitance[CAS0 - CAS3]
Input/Output capacitance[DQ0 - 35]
-
-
-
-
-
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, Vcc=5.0V
±
10%. See notes 1,2.)
Test condition : V
ih
/V
il
=2.6/0.8V, V
oh
/V
ol
=2.0/0.8V, output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
84
Max
Min
104
Max
Random read or write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay from CAS
Transition time(rise and fall)
RAS precharge time
RAS pulse width
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
Column address to RAS lead time
Read command set-up time
Read command hold referenced to CAS
Read command hold referenced to RAS
Write command set-up time
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Data set-up time
Data hold time
Refresh period
CAS setup time (CAS-before-RAS refresh)
CAS hold time (CAS-before-RAS refresh)
RAS to CAS precharge time
Access time from CAS precharge
t
RC
t
RAC
t
CAC
t
AA
t
CLZ
t
CEZ
t
T
t
RP
t
RAS
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
ASR
t
RAH
t
ASC
t
CAH
t
RAL
t
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
REF
t
CSR
t
CHR
t
RPC
t
CPA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
50
13
25
60
15
30
3,4,10
3,4,5
3,10
3
6,12
2
3
3
1
3
3
1
40
60
15
45
10
20
15
5
0
10
0
10
30
0
0
0
0
10
10
15
10
0
10
13
50
13
50
30
50
13
38
8
20
15
5
0
10
0
8
25
0
0
0
0
10
10
13
8
0
8
10K
10K
10K
37
25
10K
45
30
4
9
8
8
7
9
9
64
64
5
5
10
5
10
5
28
35
3
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PDF描述 |
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| KMM5364005CSWG | 4M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V |
| KMM5364005CK | 4M x 36 DRAM SIMM using 4Mx4 and 16M Quad CAS, 4K/2K, Refresh, 5V |
| KMM5364005CSW | 4M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V |
| KMM5364005CKG | 4M x 36 DRAM SIMM using 4Mx4 and 16M Quad CAS, 4K/2K, Refresh, 5V |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM5364005CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 36 DRAM SIMM using 4Mx4 and 16M Quad CAS, 4K/2K, Refresh, 5V |
| KMM5364005CKG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 36 DRAM SIMM using 4Mx4 and 16M Quad CAS, 4K/2K, Refresh, 5V |
| KMM5364005CSW | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V |
| KMM5364005CSWG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V |
| KMM5364103CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 36 DRAM SIMM using 4Mx4 and 16M Quad CAS, 4K/2K Refresh, 5V |
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