參數(shù)資料
型號(hào): KMPC8360ZUAJDGA
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 73/102頁(yè)
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II PRO 740TBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類(lèi)型: 32-位 MPC83xx PowerQUICC II Pro
速度: 533MHz
電壓: 1.2V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 740-LBGA
供應(yīng)商設(shè)備封裝: 740-TBGA(37.5x37.5)
包裝: 托盤(pán)
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
72
Freescale Semiconductor
Pinout Listings
This table shows the pin list of the MPC8358E TBGA package.
No Connect
NC
AM20, AU19
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 k
Ω) should be placed on this pin to OVDD
2. This pin is an open drain signal. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to OVDD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.
6. These are On Die Termination pins, used to control DDR2 memories internal termination resistance.
7. This pin must always be tied to GND.
8. This pin must always be left not connected.
9. Refer to MPC8360E PowerQUICC II Pro Integrated Communications Processor Reference Manual section on “RGMII Pins,”
for information about the two UCC2 Ethernet interface options.
10.It is recommended that MDIC0 be tied to GND using an 18.2
Ω resistor and MDIC1 be tied to DDR power using an 18.2 Ω
resistor for DDR2.
Table 67. MPC8358E TBGA Pinout Listing
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
DDR SDRAM Memory Controller Interface
MEMC1_MDQ[0:63]
AJ34, AK33, AL33, AL35, AJ33, AK34, AK32,
AM36, AN37, AN35, AR34, AT34, AP37, AP36,
AR36, AT35, AP34, AR32, AP32, AM31, AN33,
AM34, AM33, AM30, AP31, AM27, AR30, AT32,
AN29, AP29, AN27, AR29, AN8, AN7, AM8, AM6,
AP9, AN9, AT7, AP7, AU6, AP6, AR4, AR3, AT6,
AT5, AR5, AT3, AP4, AM5, AP3, AN3, AN5, AL5,
AN4, AM2, AL2, AH5, AK3, AJ2, AJ3, AH4, AK4,
AH3
I/O
GVDD
MEMC_MECC[0:4]/MSRCID[0:4]
AP24, AN22, AM19, AN19, AM24
I/O
GVDD
MEMC_MECC[5]/MDVAL
AM23
I/O
GVDD
MEMC_MECC[6:7]
AM22, AN18
I/O
GVDD
MEMC_MDM[0:8]
AL36, AN34, AP33, AN28,AT9, AU4, AM3,
AJ6,AP27
OGVDD
MEMC_MDQS[0:8]
AK35, AP35, AN31, AM26,AT8, AU3, AL4, AJ5,
AP26
I/O
GVDD
MEMC_MBA[0:1]
AU29, AU30
O
GVDD
MEMC_MBA[2]
AT30
O
GVDD
MEMC_MA[0:14]
AU21, AP22, AP21, AT21, AU25, AU26, AT23,
AR26, AU24, AR23, AR28, AU23, AR22, AU20,
AR18
OGVDD
MEMC_MODT[0:3]
AG33, AJ36, AT1, AK2
O
GVDD
Table 66. MPC8360E TBGA Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
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