參數(shù)資料
型號: KMPC8379VRALG
廠商: Freescale Semiconductor
文件頁數(shù): 81/117頁
文件大小: 0K
描述: IC MPU POWERQUICC II 689-PBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 667MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
66
Freescale Semiconductor
This figure provides the AC test load for the GPIO.
Figure 44. GPIO AC Test Load
18 IPIC
This section describes the DC and AC electrical specifications for the external interrupt pins of the chip.
18.1
IPIC DC Electrical Characteristics
This table provides the DC electrical characteristics for the external interrupt pins of the chip.
18.2
IPIC AC Timing Specifications
This table provides the IPIC input and output AC timing specifications.
19 SPI
This section describes the DC and AC electrical specifications for the SPI of the chip.
Table 64. IPIC DC Electrical Characteristics
Parameter
Condition
Symbol
Min
Max
Unit
Input high voltage
VIH
2.0
OVDD + 0.3
V
Input low voltage
VIL
–0.3
0.8
V
Input current
IIN
—±30
μA
Output low voltage
IOL = 6.0 mA
VOL
—0.5
V
Output low voltage
IOL = 3.2 mA
VOL
—0.4
V
Note:
1. This table applies for pins IRQ[0:7], IRQ_OUT, MCP_OUT.
2. IRQ_OUT and MCP_OUT are open drain pins, thus VOH is not relevant for those pins.
Table 65. IPIC Input AC Timing Specifications
Parameter
Symbol
Min
Unit
IPIC inputs—minimum pulse width
tPIWID
20
ns
Note:
1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are
measured at the pin.
2. IPIC inputs and outputs are asynchronous to any visible clock. IPIC outputs should be synchronized before use by any
external synchronous logic. IPIC inputs are required to be valid for at least tPIWID ns to ensure proper operation when working
in edge triggered mode.
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
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