參數(shù)資料
型號(hào): KMSC7118VM1200
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 11/60頁(yè)
文件大小: 0K
描述: DSP 16BIT W/DDR CTRLR 400-MAPBGA
標(biāo)準(zhǔn)包裝: 2
系列: StarCore
類型: 定點(diǎn)
接口: 主機(jī)接口,I²C,UART
時(shí)鐘速率: 300MHz
非易失內(nèi)存: ROM(8 kB)
芯片上RAM: 464kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 400-LFBGA
供應(yīng)商設(shè)備封裝: 400-MAPBGA(17x17)
包裝: 托盤
Electrical Characteristics
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
Freescale Semiconductor
19
Table 4 describes thermal characteristics of the MSC7118 for the MAP-BGA package.
Section 3.1, Thermal Design Considerations explains these characteristics in detail.
This section describes the DC electrical characteristics for the MSC7118.
Note:
The leakage current is measured for nominal voltage values must vary in the same direction (for example, both VDDIO
and VDDC vary by +2 percent or both vary by –2 percent).
Table 4. Thermal Characteristics for MAP-BGA Package
Characteristic
Symbol
MAP-BGA 17
× 17 mm5
Unit
Natural
Convection
200 ft/min
(1 m/s) airflow
Junction-to-ambient1, 2
RθJA
39
31
°C/W
Junction-to-ambient, four-layer board1, 3
RθJA
23
20
°C/W
Junction-to-board4
RθJB
12
°C/W
Junction-to-case5
RθJC
7
°C/W
Junction-to-package-top6
ΨJT
2
°C/W
Notes:
1.
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2.
Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.
3.
Per JEDEC JESD51-6 with the board horizontal.
4.
Thermal resistance between the die and the printed circuit board per JEDEC JESD 51-8. Board temperature is measured on
the top surface of the board near the package.
5.
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6.
Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2.
Table 5. DC Electrical Characteristics
Characteristic
Symbol
Min
Typical
Max
Unit
Core and PLL voltage
VDDC
VDDPLL
1.14
1.2
1.26
V
DRAM interface I/O voltage1
VDDM
2.375
2.5
2.625
V
I/O voltage
VDDIO
3.135
3.3
3.465
V
DRAM interface I/O reference voltage2
VREF
0.49
× VDDM
1.25
0.51
× VDDM
V
DRAM interface I/O termination voltage3
VTT
VREF – 0.04
VREF
VREF + 0.04
V
Input high CLKIN voltage
VIHCLK
2.4
3.0
3.465
V
DRAM interface input high I/O voltage
VIHM
VREF + 0.28
VDDM
VDDM + 0.3
V
DRAM interface input low I/O voltage
VILM
–0.3
GND
VREF – 0.18
V
Input leakage current, VIN = VDDIO
IIN
–1.0
0.09
1
A
VREF input leakage current
IVREF
——
5
A
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