參數(shù)資料
型號(hào)： KS57C5312
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： The KS57C5204/C5208/C5304/C5308/C5312 single-chip CMOS microcontroller has been designed for highperformance using SAM 47 Samsung Arrangeable Microcon
中文描述： 在KS57C5204/C5208/C5304/C5308/C5312單芯片CMOS微控制器是專為使用SAM 47型高性能三星Arrangeable Microcon
文件頁數(shù)： 10/40頁
文件大?。?/td> 283K
代理商： KS57C5312
PRODUCT OVERVIEW
KS57C5204/C5208/P5208/C5304/C5308/P5308/C5312/P5312
1-10
Table 1-2. KS57C5304/C5308/C5312 Pin Descriptions (Continued)
Pin Name
I/O
Type
Description
Pin
Number
Share
Pin
Circuit
Type
DTMF
O
DTMF output.
22 (23)
–
G-6
INT0
I
External interrupt input.
The triggering edge for INT0 is selectable.
23 (25)
P1.0
A-3
TCLO0
I/O
Timer/counter 0 clock output
24 (26)
P2.0
D-2
TCLO1
I/O
Timer/counter 1 clock output
25 (27)
P2.1
D-2
CLO
I/O
Clock output
26 (28)
P2.2
D-2
BUZ
I/O
2 kHz, 4 kHz, 8 kHz, or 16 kHz frequency output at the
watch timer clock frequency of 4.19 MHz for buzzer
sound
27 (29)
P2.3
D-2
TCL0
I/O
External clock input for timer/counter 0
28 (30)
P3.0
D-4
TCL1
I/O
External clock input for timer/counter 1
29 (31)
P3.1
D-4
BTCO
V
DD
V
SS
X
IN
X
OUT
I/O
Basic timer clock output
5 (5)
P4.0
E-2
–
Power supply
30 (32)
–
–
–
Ground
1 (1)
–
–
–
Crystal, or ceramic oscillator signal for main system
clock. (For external clock input, use X
IN
and input X
IN
's
reverse phase to X
OUT
)
No connection
3 (3)
2 (2)
–
–
NC
–
(9, 24)
–
–
TEST
–
Chip test input pin, Hold GND when the device is
operating.
4 (4)
–
–
RESET
–
RESET
signal
7 (7)
–
B
KS0-KS3
KS4-KS7
I/O
Quasi-interrupt inputs with falling edge detection
14-17
(15-18)
18-21
(19-22)
P6.0-P6.3
P7.0-P7.3
D-4
NOTE:
Parentheses indicate the pin number for 32-SOP package.
相關(guān)PDF資料
PDF描述
KS57P5312 The KS57C5204/C5208/C5304/C5308/C5312 single-chip CMOS microcontroller has been designed for highperformance using SAM 47 Samsung Arrangeable Microcon
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