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參數(shù)資料
| 型號(hào)： | KS8721SL TR |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 10/33頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX PHY 10/100 3.3V 48SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | IEEE 802 |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | 576-1010-ND - BOARD EVAL EXPERIMENT KS8721SL |
| 其它名稱： | KS8721SLTR |
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KS8721BL/SL
Micrel
M9999-051704
18
May 2004
Address
Name
Description
Mode(1)
Default
Register 0h - Basic Control
0.15
Reset
1 = software reset. Bit is self-clearing.
RW/SC
0
0.14
Loop-Back
1 = loop-back mode; 0 = normal operation.
RW
0
0.13
Speed Select (LSB)
1 = 100Mbps; 0 = 10Mbps.
RW
Set by
Ignored if Auto-Negotiation is enabled (0.12 = 1).
SPD100
0.12
Auto-Negotiation Enable
1 = enable auto-negotiation process (override 0.13 and 0.8).
RW
Set by
0 = disable auto-negotiation process.
NWAYEN
0.11
Power Down
1 = power-down mode; 0 = normal operation.
RW
0
0.10
Isolate
1 = electrical isolation of PHY from MII and TX+/TX-.
RW
Set by ISO
0 = normal operation.
0.9
Restart Auto-Negotiation
1 = restart auto-negotiation process.
RW/SC
0
0 = normal operation. Bit is self-clearing.
0.8
Duplex Mode
1 = full-duplex; 0 = half-duplex.
RW
Set by
DUPLEX
0.7
Collision Test
1 = enable COL test; 0 = disable COL test.
RW
0
0.6:1
Reserved
RO
0
0.0
Disable
0 = enable transmitter.
R/W
0
Transmitter
1 = disable transmitter.
Register 1h - Basic Status
1.15
100BASE-T4
1 = T4 capable; 0 = not T4 capable.
RO
0
1.14
100BASE-TX Full-Duplex
1 = capable of 100BASE-X full-duplex.
RO
1
0 = not capable of 100BASE-X full-duplex.
1.13
100BASE-TX Half-Duplex
1 = capable of 100BASE-X half-duplex.
RO
1
0 = not capable of 100BASE-X half-duplex.
1.12
10BASE-T Full-Duplex
1 = 10Mbps with full-duplex.
RO
1
0 = no 10Mbps with full-duplex capability.
1.11
10BASE-T Half-Duplex
1 = 10Mbps with half-duplex.
RO
1
0 = no 10Mbps with half-duplex capability.
Note:
1. RW: Read/Write, RO: Read Only, SC: Self Clear, LH: Latch High, LL: Latch Low. Some of the default values are set by strap-in. See “Strapping
Options.”
Register Map
Register No.
Description
0h
Basic Control Register
1h
Basic Status Register
2h
PHY Identifier I
3h
PHY Identifier II
4h
Auto-Negotiation Advertisement Register
5h
Auto-Negotiation Link Partner Ability Register
6h
Auto-Negotiation Expansion Register
7h
Auto-Negotiation Next Page Register
8h
Link Partner Next Page Ability
15h
RXER Counter Register
1bh
Interrupt Control/Status Register
1fh
100BASE-TX PHY Control Register
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