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參數(shù)資料
| 型號： | KS8721SL TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 33/33頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX PHY 10/100 3.3V 48SSOP |
| 標準包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | IEEE 802 |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | 576-1010-ND - BOARD EVAL EXPERIMENT KS8721SL |
| 其它名稱： | KS8721SLTR |
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May 2004
9
M9999-051704
KS8721BL/SL
Micrel
Strapping Options(1)
Pin Number
Pin Name
Type(2)
Description
6,5,
PHYAD[4:1]/
Ipd/O
PHY Address latched at power-up/reset. The default PHY address is 00001.
4,3
RXD[0:3]
25
PHYAD0/
Ipu/O
INT#
9
PCS_LPBK/
Ipd/O
Enables PCS_LPBK mode at power-up/reset. PD (default) = Disable, PU = Enable.
RXDV
11
ISO/RXER
Ipd/O
Enables ISOLATE mode at power-up/reset. PD (default) = Disable, PU = Enable.
21
RMII/COL
Ipd/O
Enables RMII mode at power-up/reset. PD (default) = Disable, PU = Enable.
22
RMII_BTB
Ipd/O
Enable RMII back-to-back mode at power-up/reset. PD (default) = Disable,
CRS
PU = Enable.
27
SPD100/
Ipu/O
Latched into Register 0h bit 13 during power-up/reset. PD = 10Mbps, PU (default)
No FEF/
= 100Mbps. If SPD100 is asserted during power-up/reset, this pin is also latched as
LED1
the Speed Support in register 4h. (If FXEN is pulled up, the latched value 0
means no Far_End _Fault.)
28
DUPLEX/
Ipu/O
Latched into Register 0h bit 8 during power-up/reset. PD = Half-duplex, PU
LED2
(default) = Full-duplex. If Duplex is pulled up during reset, this pin is also latched as
the Duplex support in register 4h.
29
NWAYEN/
Ipu/O
Nway (auto-negotiation) Enable. Latched into Register 0h bit 12 during power-up/
LED3
reset. PD = Disable Auto-Negotiation, PU (default) = Enable Auto-Negotiation.
30
PD#
Ipu
Power-Down Enable. PU (default) = Normal operation, PD = Power-Down mode.
Notes:
1. Strap-in is latched during power-up or reset.
2. Ipu = Input w/ internal pull-up.
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise.
See “Reference Circuit” section for pull-up/pull-down and float information.
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參數(shù)描述 |
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