- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄1931 > KS8995MAI (Micrel Inc)IC SWITCH 10/100 5PORT 128PQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | KS8995MAI |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 29/73頁(yè) |
| 文件大小： | 0K |
| 描述： | IC SWITCH 10/100 5PORT 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 系列： | * |
| 類(lèi)型： | * |
| 應(yīng)用： | * |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 散裝 |
| 配用： | 576-1017-ND - BOARD EVAL EXPERIMENT KS8995M |
| 其它名稱(chēng)： | 576-1019 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)當(dāng)前第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)
May 2005
35
M9999-051305
KS8995MA
Micrel, Inc.
I2C Master Serial Bus Configuration
If a 2-wire EEPROM exists, the KS8995MA can perform more advanced features like broadcast storm protection and rate
control. The EEPROM should have the entire valid configuration data from Register 0 to Register 109 defined in the “Memory
Map,” except the status registers. After reset, the KS8995MA will start to read all 110 registers sequentially from the EEPROM.
The configuration access time (t
prgm) is less than 15ms as shown in Figure 7.
....
RST_N
SCL
SDA
t
prgm<15 ms
Figure 7. KS8995MA EEPROM
Configuration Timing Diagram
To configure the KS8995MA with a pre-configured EEPROM use the following steps:
1. At the board level, connect pin 110 on the KS8995MA to the SCL pin on the EEPROM. Connect pin 111 on the
KS8995MA to the SDA pin on the EEPROM.
2. Set the input signals PS[1:0] (pins 113 and 114, respectively) to “00.” This puts the KS8995MA serial bus
configuration into I2C master mode.
3. Be sure the board-level reset signal is connected to the KS8995MA reset signal on pin 115 (RST_N).
4. Program the contents of the EEPROM before placing it on the board with the desired configuration data. Note that
the first byte in the EEPROM must be “95” for the loading to occur properly. If this value is not correct, all other data
will be ignored.
5. Place EEPROM on the board and power up the board. Assert the active-low board level reset to RST_N on the
KS8995MA. After the reset is de-asserted, the KS8995MA will begin reading configuration data from the EEPROM.
The configuration access time (t
prgm) is less than 15ms.
Note: For proper operation, make sure that pin 47 (PWRDN_N) is not asserted during the reset operation.
SPI Slave Serial Bus Configuration
The KS8995MA can also act as an SPI slave device. Through the SPI, the entire feature set can be enabled, including “VLAN,”
“IGMP snooping,” “MIB counters,” etc. The external master device can access any register from Register 0 to Register 127
randomly. The system should configure all the desired settings before enabling the switch in the KS8995MA. To enable the
switch, write a "1" to Register 1 bit 0.
Two standard SPI commands are supported (00000011 for “READ DATA,” and 00000010 for “WRITE DATA”). To speed
configuration time, the KS8995MA also supports multiple reads or writes. After a byte is written to or read from the KS8995MA,
the internal address counter automatically increments if the SPI Slave Select Signal (SPIS_N) continues to be driven low. If
SPIS_N is kept low after the first byte is read, the next byte at the next address will be shifted out on SPIQ. If SPIS_N is kept
low after the first byte is written, bits on the Master Out Slave Input (SPID) line will be written to the next address. Asserting
SPIS_N high terminates a read or write operation. This means that the SPIS_N signal must be asserted high and then low again
before issuing another command and address. The address counter wraps back to zero once it reaches the highest address.
Therefore the entire register set can be written to or read from by issuing a single command and address.
The KS8995MA is able to support a 5MHz SPI bus. A high performance SPI master is recommended to prevent internal counter
overflow.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KS8995MI | IC SWITCH 10/100 5PORT 128PQFP |
| KS8995XA | IC SWITCH 10/100 5PORT 128PQFP |
| KS8997 | IC SWITCH 10/100 8PORT 128PQFP |
| KS8999I | IC SWITCH 9-PORT 10/100 208-PQFP |
| KSZ8001LI TR | IC TXRX PHY 10/100 3.3V 48LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KS8995MAL | 功能描述:IC SWITCH 10/100 5PORT 128PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 專(zhuān)用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類(lèi)型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| KS8995M-EVAL | 功能描述:BOARD EVAL EXPERIMENT KS8995M RoHS:否 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
| KS8995MI | 功能描述:IC SWITCH 10/100 5PORT 128PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 專(zhuān)用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類(lèi)型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| KS8995X | 功能描述:IC SWITCH 10/100 5PORT 128PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 專(zhuān)用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類(lèi)型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| KS8995X_04 | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Integrated 5-Port 10/100 QoS Switch |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。