- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16863 > KSZ8041RNL-EVAL (Micrel Inc)BOARD EVALUATION FOR KSZ8041RNL PDF資料下載
參數(shù)資料
| 型號： | KSZ8041RNL-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 18/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8041RNL |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) PHY |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8041RNL |
| 主要屬性： | 單芯片 PHY，10BASE-T/100BASE-TX |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | 576-3979-2-ND - IC TXRX PHY 10/100 3.3V 32MLF 576-3745-6-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3745-1-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3745-2-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3623-6-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3623-1-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3623-2-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3503-ND - TXRX 10/100 3.3V PHY RMII 32-MLF |
| 其它名稱： | 576-3863 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
Micrel, Inc.
KSZ8041NL/RNL
September 2010
25
M9999-090910-1.4
Receive Data Valid (RXDV)
RXDV is driven by the PHY to indicate that the PHY is presenting recovered and decoded nibbles on RXD[3:0].
In 10Mbps mode, RXDV is asserted with the first nibble of the SFD (Start of Frame Delimiter), “5D”, and remains
asserted until the end of the frame.
In 100Mbps mode, RXDV is asserted from the first nibble of the preamble to the last nibble of the frame.
RXDV transitions synchronously with respect to RXC.
Receive Data [3:0] (RXD[3:0])
RXD[3:0] transitions synchronously with respect to RXC. For each clock period in which RXDV is asserted, RXD[3:0]
transfers a nibble of recovered data from the PHY.
Receive Error (RXER)
RXER is asserted for one or more RXC periods to indicate that a Symbol Error (e.g. a coding error that a PHY is capable
of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the frame
presently being transferred from the PHY.
RXER transitions synchronously with respect to RXC. While RXDV is de-asserted, RXER has no effect on the MAC.
Carrier Sense (CRS)
CRS is asserted and de-asserted as follows:
In 10Mbps mode, CRS assertion is based on the reception of valid preambles. CRS de-assertion is based on the
reception of an end-of-frame (EOF) marker.
In 100Mbps mode, CRS is asserted when a start-of-stream delimiter, or /J/K symbol pair is detected. CRS is de-
asserted when an end-of-stream delimiter, or /T/R symbol pair is detected. Additionally, the PMA layer de-asserts
CRS if IDLE symbols are received without /T/R.
Collision (COL)
COL is asserted in half-duplex mode whenever the transmitter and receiver are simultaneously active on the line. This is
used to inform the MAC that a collision has occurred during its transmission to the PHY.
COL transitions asynchronously with respect to TXC and RXC.
Reduced MII (RMII) Data Interface
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). It provides
a common interface between physical layer and MAC layer devices, and has the following key characteristics:
Supports 10Mbps and 100Mbps data rates.
Uses a 50MHz reference clock.
Provides independent 2-bit wide (di-bit) transmit and receive data paths.
Contains two distinct groups of signals: one for transmission and the other for reception.
The KSZ8041NL is configured in RMII mode after it is power-up or reset with the following:
A 50MHz reference clock connected to REFCLK (pin 9).
CONFIG[2:0] (pins 18, 29, 28) set to ‘001’.
The KSZ8041RNL is configured in RMII mode and outputs the 50MHz RMII reference clock to the MAC on REF_CLK (pin
19) after it is power-up or reset with the following:
A 25MHz crystal connected to XI (pin 9) and XO (pin 8), or a 25MHz reference clock connected to XI (pin 9).
CONFIG[2:0] (pins 18, 29, 28) set to ‘001’.
In RMII mode, unused MII signals, TXD[3:2] (pins 27, 26), are tied to ground.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V110B24E150B2 | CONVERTER MOD DC/DC 24V 150W |
| UKA0J471MPD1TD | CAP ALUM 470UF 6.3V 20% RADIAL |
| KSZ8041NL-EVAL | BOARD EVALUATION FOR KSZ8041NL |
| DWP-125-1/2-0-STK | HEATSHRINK POLY 1/2"X4' BLK |
| SRR4028-270Y | INDUCTOR POWER 27UH 0.89A 4028 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8041RNLI | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver |
| KSZ8041RNLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with RMII Support (Industrial grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041RNLI TR-SAMPLE | 制造商:Micrel Inc 功能描述: |
| KSZ8041RNLI-TR | 功能描述:1/1 Transceiver Full RMII 32-MLF? (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 類型:收發(fā)器 協(xié)議:RMII 驅(qū)動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤，32-MLF? 供應(yīng)商器件封裝:32-MLF?（5x5） 標(biāo)準(zhǔn)包裝:1 |
| KSZ8041RNLTR | 制造商:Micrel 功能描述:Physical Layer Transceiver |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。