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參數(shù)資料
| 型號： | KSZ8051RNL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 17/59頁 |
| 文件大?。?/td> | 0K |
| 描述： | TXRX PHY 10/T100 3.3V RMII 32QFN |
| 特色產(chǎn)品： | KSZ8051RNL Physical Layer Transceiver |
| 標準包裝： | 640 |
| 類型： | PHY 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RMII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 托盤 |
| 其它名稱： | 576-3713 |
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Micrel, Inc.
KSZ8051MNL/RNL
July 2010
24
M9999-070910-1.0
RMII Data Interface (KSZ8051RNL only)
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). It provides
a common interface between physical layer and MAC layer devices, and has the following key characteristics:
Pin count is 8 pins (3 pins for data transmission, 4 pins for data reception, 1 pin for the 50MHz reference clock).
10Mbps and 100Mbps data rates are supported at both half and full duplex.
Data transmission and reception are independent and belong to separate signal groups.
Transmit data and receive data are each 2-bit wide, a dibit.
RMII – 25MHz Clock Mode
The KSZ8051RNL is configured to RMII – 25MHz Clock Mode after it is powered up or hardware reset with the following:
A 25MHz crystal connected to XI, XO (pins 9, 8), or an external 25MHz clock source (oscillator) connected to XI.
The CONFIG[2:0] strapping pins (pins 18, 29, 28) set to ‘001’.
Register 1Fh, bit 7 is set to ‘0’ (default value) to select 25MHz Clock Mode.
RMII – 50MHz Clock Mode
The KSZ8051RNL is configured to RMII – 50MHz Clock Mode after it is powered up or hardware reset with the following:
An external 50MHz clock source (oscillator) connected to XI (pin 9).
The CONFIG[2:0] strapping pins (pins 18, 29, 28) set to ‘001’.
Register 1Fh, bit 7 is set to ‘1’ to select 50MHz Clock Mode.
RMII Signal Definition
The following table describes the RMII signals. Refer to RMII Specification v1.2 for detailed information.
RMII
Signal Name
Direction
(with respect to PHY,
KSZ8051RNL signal)
Direction
(with respect to
MAC)
Description
REF_CLK
Output (25MHz clock mode) /
<no connect> (50MHz clock
mode)
Input /
Input or <no connect>
Synchronous 50 MHz reference clock for
receive, transmit and control interface
TXEN
Input
Output
Transmit Enable
TXD[1:0]
Input
Output
Transmit Data [1:0]
CRS_DV
Output
Input
Carrier Sense/Receive Data Valid
RXD[1:0]
Output
Input
Receive Data [1:0]
RXER
Output
Input, or (not
required)
Receive Error
Table 2. RMII Signal Description
Reference Clock (REF_CLK)
REF_CLK is a continuous 50MHz clock that provides the timing reference for TX_EN, TXD[1:0], CRS_DV, RXD[1:0], and
RX_ER.
For 25MHz Clock Mode, the KSZ8051RNL generates and outputs the 50MHz RMII REF_CLK to the MAC at REF_CLK
(pin 19).
For 50MHz Clock Mode, the KSZ8051RNL takes in the 50MHz RMII REF_CLK from the MAC or system board at XI (pin
9) and has the REF_CLK (pin 19) left as a no connect.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8051RNL AM | 功能描述:以太網(wǎng) IC Single-Port 10/100BT PHY (Automotive) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051RNL AM TR | 功能描述:以太網(wǎng) IC Single-Port 10/100BT PHY (Automotive) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051RNL TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (32-QFN) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051RNL-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (32-QFN) - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8051RNLI | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver |
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