參數(shù)資料
型號(hào)： KSZ8863FLL-EVAL
廠商： Micrel Inc
文件頁數(shù)： 63/106頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR KSZ8863FLL
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8863FLL
已供物品： 板
相關(guān)產(chǎn)品： 576-3750-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3576-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱： 576-3866
PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 59
10.0
SPECIAL FEATURES OF THE
CPU
The PIC16C72 series has a host of such features
intended to maximize system reliability, minimize cost
through elimination of external components, provide
power saving operating modes and offer code protec-
tion. These are:
Oscillator selection
Reset
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
Interrupts
Watchdog Timer (WDT)
SLEEP
Code protection
ID locations
In-Circuit Serial Programming
The PIC16CXXX family has a Watchdog Timer which
can be shut off only through conguration bits. It runs
off its own RC oscillator for added reliability. There are
two timers that offer necessary delays on power-up.
One is the Oscillator Start-up Timer (OST), intended to
keep the chip in reset until the crystal oscillator is sta-
ble. The other is the Power-up Timer (PWRT), which
provides a xed delay of 72 ms (nominal) on power-up
only, designed to keep the part in reset while the power
supply stabilizes. With these two timers on-chip, most
applications need no external reset circuitry.
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external reset, Watchdog Timer Wake-up, or
through an interrupt. Several oscillator options are also
made available to allow the part to t the application.
The RC oscillator option saves system cost while the
LP crystal option saves power. A set of conguration
bits are used to select various options.
Additional information on special features is available in
the PICmicro Mid-Range MCU Family Reference
Manual, DS33023.
10.1
Conguration Bits
The conguration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device congurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/conguration memory space (2000h -
3FFFh), which can be accessed only during program-
ming.
FIGURE 10-1: CONFIGURATION WORD FOR PIC16C72/R72
CP1
CP0
CP1
CP0
CP1
CP0
—
BODEN
CP1
CP0
PWRTE
WDTE
FOSC1
FOSC0
Register:CONFIG
Address2007h
bit13
bit0
bit 13-8
CP1:CP0: Code Protection bits (2)
5-4:
11
= Code protection off
10
= Upper half of program memory code protected
01
= Upper 3/4th of program memory code protected
00
= All memory is code protected
bit 7:
Unimplemented: Read as '1'
bit 6:
BODEN: Brown-out Reset Enable bit (1)
1 = BOR enabled
0 = BOR disabled
bit 3:
PWRTE: Power-up Timer Enable bit (1)
1 = PWRT disabled
0 = PWRT enabled
bit 2:
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 1-0:
FOSC1:FOSC0: Oscillator Selection bits
11
= RC oscillator
10
= HS oscillator
01
= XT oscillator
00
= LP oscillator
Note 1:
Enabling Brown-out Reset automatically enables Power-up Timer (PWRT) regardless of the value of bit PWRTE.
Ensure the Power-up Timer is enabled anytime Brown-out Reset is enabled.
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
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