參數(shù)資料
型號: KSZ8995FQ
廠商: Micrel Inc
文件頁數(shù): 39/89頁
文件大小: 0K
描述: IC SWITCH 10/100 5PORT 128-PQFP
標準包裝: 66
系列: *
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-3872-ND - BOARD EVALUATION FOR KSZ8995FQ
其它名稱: 576-3077
Micrel, Inc.
KS8995MA/FQ
October 2011
44
M9999-102611-3.0
To use the KS8995MA/FQ SPI:
1. At the board level, connect KS8995MA/FQ pins as follows:
KS8995MA/FQ Pin Number
KS8995MA/FQ Signal Name
Microprocessor Signal Description
112
SPIS_N
SPI Slave Select
110
SPIC
SPI Clock
111
SPID
Master Out Slave Input
109
SPIQ
Master In Slave Output
Table 9. SPI Connections
2. Set the input signals PS[1:0] (pins 113 and 114, respectively) to “10” to set the serial configuration to SPI slave mode.
3. Power up the board and assert a reset signal. After reset wait 100s, the start switch bit in Register 1 will be set to ‘0’.
Configure the desired settings in the KS8995MA/FQ before setting the start register to ‘1.'
4. Write configuration to registers using a typical SPI write data cycle as shown in Figure 9 or SPI multiple write as
shown in Figure 11. Note that data input on SPID is registered on the rising edge of SPIC.
5. Registers can be read and configuration can be verified with a typical SPI read data cycle as shown in Figure 10 or a
multiple read as shown in Figure 12. Note that read data is registered out of SPIQ on the falling edge of SPIC.
6. After configuration is written and verified, write a ‘1’ to Register 1 bit 0 to begin KS8995MA/FQ operation.
SPIQ
SPIC
SPID
SPIS_N
0
000
00
10
X
A7 A6 A5 A4 A3 A2 A1 A0
WRITE COMMAND
WRITE ADDRESS
WRITE DATA
D2
D0
D1
D3
D4
D5
D6
D7
Figure 9. SPI Write Data Cycle
SPIQ
SPIC
SPID
SPIS_N
00000011
X
A7 A6 A5 A4 A3 A2 A1 A0
D7
D6
D5
D4
D3
D2
D1
D0
READ COMMAND
READ ADDRESS
READ DATA
Figure 10. SPI Read Data Cycle
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