參數(shù)資料
型號(hào)： KSZ9021GN TR
廠商： Micrel Inc
文件頁(yè)數(shù)： 6/53頁(yè)
文件大?。?/td> 0K
描述： TXRX ETHERNET GB GMII/MII 64MLF
標(biāo)準(zhǔn)包裝： 1,000
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： 千兆位以太網(wǎng)
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-QFN（8x8）
包裝： 帶卷 (TR)
配用： 576-3873-ND - BOARD EVALUATION FOR KSZ9021GN
Micrel, Inc.
KSZ9021GN
September 2010
14
M9999-091010-1.1
Strapping Options
Pin Number
Pin Name
Type
(1)
Pin Function
48
17
19
PHYAD2
PHYAD1
PHYAD0
I/O
The PHY Address, PHYAD[2:0], is latched at power-up / reset and is configurable to
any value from 1 to 7. Each PHY address bit is configured as follows:
Pull-up = 1
Pull-down = 0
PHY Address bits [4:3] are always set to ‘00’.
39
41
43
44
MODE3
MODE2
MODE1
MODE0
I/O
The MODE[3:0] strap-in pins are latched at power-up / reset and are defined as
follows:
MODE[3:0]
Mode
0000
Reserved – not used
0001
GMII / MII Mode
0010
Reserved – not used
0011
Reserved – not used
0100
NAND Tree Mode
0101
Reserved – not used
0110
Reserved – not used
0111
Chip Power Down Mode
1000
Reserved – not used
1001
Reserved – not used
1010
Reserved – not used
1011
Reserved – not used
1100
Reserved – not used
1101
Reserved – not used
1110
Reserved – not used
1111
Reserved – not used
45
CLK125_EN
I/O
CLK125_EN is latched at power-up / reset and is defined as follows:
Pull-up = Enable 125MHz Clock Output
Pull-down = Disable 125MHz Clock Output
Pin 55 (CLK125_NDO) provides the 125MHz reference clock output option for use by
the MAC.
55
LED_MODE
I/O
LED_MODE is latched at power-up / reset and is defined as follows:
Pull-up = Single LED Mode
Pull-down = Tri-color Dual LED Mode
Note:
1.
I/O = Bi-directional.
Pin strap-ins are latched during power-up or reset. In some systems, the MAC receive input pins may be driven during
power-up or reset, and consequently cause the PHY strap-in pins on the GMII/MII signals to be latched to the incorrect
configuration. In this case, it is recommended to add external pull-ups/pull-downs on the PHY strap-in pins to ensure
the PHY is configured to the correct pin strap-in mode.
相關(guān)PDF資料
PDF描述
KSZ9021GQI TXRX GIG ETH GMII/MII 128-PQFP
KSZ9021RL IC TXRX 10/100/1000 SGL 64LQFP
KSZ9692PB IC ARM9 PHY 5MBPS 400-PBGA
KSZ9692XPB IC ARM9 PHY 5MBPS 400-PBGA
KXPC823ZT81B2T IC MPU POWERQUICC 81MHZ 256-PBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ9021GQ 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII/MII, Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021GQI 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver w/ GMII/MII, I-Temp RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021RL 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021RL-EVAL 制造商:Micrel Inc 功能描述:GIGABIT ETHERNET TRANSCEIVER W 制造商:Micrel Inc 功能描述:KIT EVALUATION FOR KSZ9021RL
KSZ9021RLI 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with RGMII, I-Temp RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*